source env variables files inside Makefile

Question

so from my local machine I am able to do this:

 . env_vars.env

and it works fine:

cat env_vars.env

#!/bin/bash
export abce=def

but when I try to reflect same in makefile it returns nothing:

SHELL=/bin/bash

print-env-vars:
        . env_vars.env
        echo ${abce}

I also tried with source env_vars.env inside makefile but output is still the same. Wondering how can I source variables inside the makefile.

This might help: [How to source a script in a Makefile?](https://stackoverflow.com/q/7507810/3776858) and [Sourcing a shell script in Make](https://blog.153.io/2016/04/18/source-a-shell-script-in-make/) — Cyrus, Feb 01 '19 at 14:05

score 11 · Answer 1 · answered Feb 01 '19 at 15:33

Each line of a make recipe is executed by a separate shell, so even if you source the file, the shell that sources it exits before the next line is evaluated. It's equivalent to running the following from your shell:

bash -c '. env_vars.env'
bash -c 'echo ${abce}'

Put both commands on the same line (or use \ to split a single logical line across multiple physical lines) so that both are executed in the same shell. The semicolon is necessary so that the shell doesn't see . env_vars.env echo ${abce} as the single command to run.

print-env-vars:
        . env_vars.env; \
        echo $${abce}

(The double dollar sign ensures that you actually pass a parameter expansion to the shell, rather than make trying to expand a make variable.)

the double dollar sign did the trick `$$`. Thanks – Matteo Sep 01 '21 at 01:26 — Matteo, Sep 01 '21 at 01:26

source env variables files inside Makefile

1 Answers1