Makefile - Execute a rule for every field in a variable

Question

I have my project binary located at my repository's root, along with a Makefile used to build it.
This binary uses many of my self-made libraries, located in my lib/ folder

For the purpose of building (and cleaning) my repository's binary, I want to implement the following execution :

Instead of hardcoding the following lines,

clean_binaries:
    make -C clean lib/folder1 -s
    make -C clean lib/folder2 -s
    make -C clean lib/another_folder -s

I created the BIN_PATH variable, containing the previous paths.

BIN_PATHS = lib/folder1 \
            lib/folder2 \
            lib/another_folder

And made a simple rule like this one :

clean_binaries: $(BIN_PATHS)
    make -C clean $< -s

BUT it only executes the line for the first field of the variable (lib/folder1), which is not what I want to do.

I thought about using implicit rules(?), just like I compile the .c files, but I couldn't get it right.
In the end, I simply wonder how to execute a rule for every field of a given variable, and this inside a Makefile, if there is any way to do so.

Thank you for your answers :]

cf. https://stackoverflow.com/questions/1490949/how-to-write-loop-in-a-makefile — jhnc, Feb 03 '19 at 22:53
Oh well, out of all the things I checked I guess making a for loop wasn't one. Thank you for your answer, it should do the job ! — HeyShafty, Feb 03 '19 at 23:04
start using non-recursive `makefiles`, have a look at https://github.com/igagis/prorab it is easy to use and have tutorials. Then you will not have to write any for-loops and lists of folders at all — igagis, Feb 03 '19 at 23:54

score 0 · Accepted Answer · answered Feb 04 '19 at 16:11

The way you get GNU make to generate a sequence of commands that vary by the fields in a variable is to use the foreach function, e.g.

Makefile

BIN_PATHS := lib/folder1 lib/folder2 lib/another_folder

.PHONY: clean_binaries

clean_binaries:
    $(foreach path,$(BIN_PATHS),make -C $(path) clean ;)

which runs like:

$ make
make -C lib/folder1 clean -s; make -C lib/folder2 clean -s; make -C lib/another_folder clean -s;

not requiring a shell-loop.

Note also that you need to correct:

make -C clean <directory>

to:

make -C <directory> clean

Makefile - Execute a rule for every field in a variable

1 Answers1