1

When reading some posts for memory alignment knowlodge, I have a question about a good answer from What is aligned memory allocation?, @dan04.

Reading the example he gives, 

 0 1 2 3 4 5 6 7
|a|a|b|b|b|b|c|d|  bytes
|       |       |  words

The problem is that on some CPU architectures, the instruction to load a 4-byte integer from memory only works on word boundaries. So your program would have to fetch each half of b with separate instructions.

Why can't (Can it?) read the 4 bytes(a word, assume 32bits) directly that contains b?

For example, if I want b

 0 1 2 3 4 5 6 7
|a|a|b|b|b|b|c|d|  bytes
    |       |      a word(assume it's 32 bit, get b directly)

read 1 word starts from address 2.

if I want a

 0 1 2 3 4 5 6 7
|a|a|b|b|b|b|c|d|  bytes
|       |          a word

read 1 word starts from address 0 and get the first 2 bytes and discard the latter 2 bytes.

if I want c and d

 0 1 2 3 4 5 6 7
|a|a|b|b|b|b|c|d|  bytes
        |       |  a word

read 1 word starts from address 4 and get the last 2 bytes and discard the first 2 bytes.

Then it seems alignment is not needed which is definitely incorrect..

I must have misunderstood something or lack some other knowledge, please help correct me..

Rick
  • 7,007
  • 2
  • 49
  • 79
  • "Why can't (Can it?) read the 4 bytes(a word, assume 32bits) directly that contains b?" The answer you have quoted already right above. The key is "on word **boundaries**". That is not the same as "in word size". I.e. those CPUs can only read word size only from exactly `N*wordsize`, not from `N*wordsize+2`. – Yunnosch Mar 13 '19 at 05:40
  • Because the hardware only allows doing a 4-byte read from addresses which are multiples of 4 – M.M Mar 13 '19 at 05:43
  • @Yunnosch What does that mean..? "on word boundaries".. Does it mean that e.g. a 32bit CPU can only reads from address 0, 4, 8, 16 and so on? address 0-3 (1 word), address 4-7(1 word). – Rick Mar 13 '19 at 05:45
  • 1
    @Rick It means exactly that. – klutt Mar 13 '19 at 05:46
  • Ok. Thank you guys... GOT IT. – Rick Mar 13 '19 at 05:47
  • @Broman Much thanks for your confirmation, which really relieve my doubt. – Rick Mar 13 '19 at 05:50
  • In practice *all* the CPUs now in existence work with word boundaries. They just do these fetches internally. Also, you shouldn't confuse the architecture requirements with the requirements of the C compiler. A C compiler can require that your `int *` must point to an aligned memory address no matter what you'd think you can infer from the processor data sheets. – Antti Haapala -- Слава Україні Mar 13 '19 at 11:31

1 Answers1

1

"Why can't (Can it?) read the 4 bytes(a word, assume 32bits) directly that contains b?"
The answer you have quoted already right above. The key is "on word boundaries". That is not the same as "in word size". I.e. those CPUs can read word width only from exactly N*wordwidth, not from N*wordwidth+2.

A wordboundary (only applicable on the mentioned platforms) is a clean multiple of the wordwidth. 0, 4, 8, 12... But not 2, 6, 10...

Picking up your phrasing from comment, yes.
Those CPUs can only read from address 0, 4, 8, 12, 16 and so on.
E.g. one word from addresses 0-3, one word from address 4-7. (Note the added 12.)

Yunnosch
  • 26,130
  • 9
  • 42
  • 54
  • Thank you @Yunnosch for helping me clarify that ~~ . It was such a pain after I read all related posts but still didn't get it right. Feels good now~ ;) – Rick Mar 13 '19 at 05:56