Can make "target" take an argument?

Question

lets say I am doing mk "target" to build something. Is it possible to pass an argument to it? i.e. mk "target" "x" and it will do things accordingly? I know that I will be providing mk "target" an argument and I know its semantics, just dont know the name well in advance.

Possible?

I thought he was talking about mknod for some reason.... or playing the new Mortal Kombat with your source.... — tamarintech, Apr 05 '11 at 19:28
Possible duplicate of [Passing arguments to "make run"](https://stackoverflow.com/questions/2214575/passing-arguments-to-make-run) — Lesmana, Jul 08 '17 at 22:08

Lightness Races in Orbit · Accepted Answer · 2011-04-05T20:30:59.320

5

You might want to make use of GNU Make's "Variables":

$ cat Makefile

ifndef LOLCAKES
   LOLCAKES=1
endif

all:
   @echo $(LOLCAKES)

$ make all LOLCAKES=42

You didn't explain what you're trying to accomplish, so it's hard to know what kind of "argument" you're after.

edited Apr 05 '11 at 20:30

answered Apr 05 '11 at 19:46

Lightness Races in Orbit

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Thanks much Tomalak. based on the argument which is a string, my "mk target" will look into different paths to do the make. So, string argument is basically a way for me to ask user for what dirs he/she wants to look into for make. does that explain? thanks again. – hari Apr 05 '11 at 19:52
@hari: Sounds like this is your solution, then. – Lightness Races in Orbit Apr 05 '11 at 20:00
Sorry for my very little knowledge for make but you mean, should ask user to export an env variable and use it? I am not quite getting what you mean here by: echo $(LOLCAKES) under target all: – hari Apr 05 '11 at 20:25
@hari: No, I am not using environment variables. Read the section in the manual about [make's variables](http://www.gnu.org/s/hello/manual/make/Using-Variables.html). – Lightness Races in Orbit Apr 05 '11 at 20:30
Thanks Tomalak. So I can do : mk target name=x and have my makefile use "name" everywhere. – hari Apr 05 '11 at 20:38
@hari: That's right. Do read the manual section for usage notes. In most places you'd write `$(name)` to get the variable's value. – Lightness Races in Orbit Apr 05 '11 at 20:39

score 2 · Answer 2 · answered Apr 05 '11 at 19:30

make target x will cause make to try to build target and x. There's no way to have a modifier like you seem to be expecting. A good solution can be to have rules with compound names:

target: target.debug target.release

target.release:
    # recipe for release build

target.debug:
    # recipe for debug build

Then you can use target.debug, target.release, or just target, and get some sane behaviour.

score 0 · Answer 3 · answered Apr 05 '11 at 19:29

0

You can use environment variables:

$ cat Makefile 
all:
    @echo $(FOO)
$ FOO=bar make
bar

answered Apr 05 '11 at 19:29

zoul

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Can make "target" take an argument?

3 Answers3