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I am working with intel pin to add some instrumentation in the binary (I think that is irrelevant to the question, but just letting you know in case). I want to detect LEA instructions such as (and I mostly observed only these kind of instructions):

lea    rax,[rbp-0x20]

My question is, can there be LEA instructions in Displacement + BaseReg + IndexReg * Scale (indirect with displacement and scaled index addressing mode) format, such as (just an example):

lea    rax,[rbp+rax*4-0x20]

Reason for asking: I need to add some special checks using intel pin if such instructions exists in x86-64. I read this manual, which does not specify if the above addressing mode might be used. I am using gcc to compile (in case needed).

R4444
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    You may want to check out the Intel manual here https://software.intel.com/en-us/articles/intel-sdm — compilers may limit their use but if you have to have a solution that works for a while, you probably want to support all available modes. – Alexis Wilke Jun 25 '19 at 03:18
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    [Sure, it exists](https://gcc.godbolt.org/z/H-UrDi). As noted in the spec sheet, `LEA` supports any `m` addressing mode. – Raymond Chen Jun 25 '19 at 03:27
  • Thanks so much! @AlexisWilke and Raymong Chen – R4444 Jun 25 '19 at 04:19
  • *and I mostly observed only these kind of instructions: `lea rax,[rbp-0x20]`* Looks like you forgot to enable optimization so the compiler is only using it to put addresses of locals into registers, and it's addressing them relative to RBP instead of RSP. GCC / clang / ICC / MSVC know how to use LEA as a shift-and-add instruction for functions like `int foo(int x) { return x*5; }` – Peter Cordes Jun 26 '19 at 06:17
  • thanks @PeterCordes I will try that – R4444 Jun 26 '19 at 16:34

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