Makefile dynamic variables as prerequisites

Question

Perhaps it's something that I'm getting wrong. Basically my task is to use make to automate a build, deploy, starting, stopping of different services. One of the things that I'm trying to do is to have a variable as a target prerequisite, however that variable has to be changed in another target.

Here's a basic sample of what I'm trying to do:

IMAGE_COUNT=-1

count_images:
    $(eval IMAGE_COUNT=5)

_should_build: $(if $(findstring $(IMAGE_COUNT),0), build,)

build:
    ...some procedure to build...

start: _should_build
    ...some procedure to start a service... 

Obviously the $(IMAGE_COUNT) in _should_build check will stay as -1, but what I want is to have the $(IMAGE_COUNT) become a 5 during the prerequisite check. A thing to note is that I cannot place the counting of images outside the count_images target. Does anyone know if this is possible at all?

Answer 1

Perhaps it's something that I'm getting wrong.

That "something" is called an evaluation order.

One of the things that I'm trying to do is to have a variable as a target prerequisite, however that variable has to be changed in another target.

Not a target, but a recipe. The recipes are preprocessed before execution. While the prerequisites are preprocessed on the first pass. In fact, changing the value of a make's variable inside a recipe in 90% of cases is a mistake. (Also remember that all preprocessing is done before feeding the recipe to the shell).

Does anyone know if this is possible at all?

Everything is possible, of course, but not this way.

A thing to note is that I cannot place the counting of images outside the count_images target.

Most probably, you can.

Anyway, the point is that some shell script (a recipe, or a part of a recipe) should return a number. However, such return values cannot be stored in a make's variable. Re-think your design and find another way for communication between your targets.