Verilog?
What I did in a similar situation, and it may be a Make novice/electrical engineer error of my own, is this:
compile.summary: compile.log
@echo Making $@
@grep -q PASSES $<
@echo Compile PASSES > $@
Because the grep -q
will fail if 'PASSES' is not present in compile.log, Make will screech to a halt.
You simply make elaborate
dependent on compile.summary
.
If you were searching for something like '*E' or 'Error', you could instead use grep -qv 'Error'
where '-v' will have grep return an error if it finds the string in compile.log.
This isn't all that user friendly, though. In the failure case, you'll simply see "Making compile.log" followed by... nothing.
In my case, it was actually dealing with programs that never return 0, so the logs have to be grepped for acceptable fails versus fatal fails.
As the other answer is getting at, it's a lot easier to manage dependencies with actual files as targets. A PHONY compile target might mean that you always re-compile when you elaborate... because it has no file+timestamp to know the freshness of the last compile vs. the inputs to the compile. It's better to have compile.log be the actual file that elaborate is dependent upon.