What are the PATA/IDE status codes, and what do they mean?

Question

I'm writing an OS for fun and I'm trying to write a PATA/IDE driver to access the disk, however it is not working. I have this line unsigned char status = port_byte_in(ATAPort + COMMANDPORT); which returns the value of 88 (decimal). As this might be an indication of what I've done wrong, and as a referance for others, what are the PATA/IDE status codes?

My driver follows the 28 bit PIO PATA/IDE process.

EDIT - to clarify, here's the port_byte_in function:

unsigned char port_byte_in(unsigned short port) {
    unsigned char result;
    __asm__("in %%dx, %%al" : "=a" (result) : "d" (port));
    return result;
}

And ATAPort is 0x1F0, COMMANDPORT = 0x07

Answer 1

Before you consider writing a device driver for any kind of device you need to find/download and read all relevant specs for that device (you shouldn't rely on partial scraps of heresy from strangers).

Most of the relevant specs are ANSI standards created by a T13 working group; and a list of them can be found here: http://www.t13.org/Standards/Default.aspx?DocumentType=3

Unfortunately they are not free (you're supposed to pay ANSI for copies because unpaid hobbyist programmers working on stuff that is no longer commercially relevant get treated the same as companies that manufacture hardware for profit (!) ). Fortunately a web search (searching for the title of the document from the T13 list) will usually find draft versions that are almost the same as the final standards.

There are many (eight?) version of the "AT Attachment" specs (plus other specs that you'll also need). The register you're talking about is the IDE/ATA controller's status register and is defined within these specs. Some of the definitions of the status register bits have changed (becoming "depends on command" or "obsolete") in different versions of the specs; and "depends on command" (for bit 4 of the status register) is what it sounds like - the meaning of that bit depends on what command you gave the controller last.

Answer 2

Brendan's answer makes some good points. Also, please note that a read from the command register is actually a read from the status register. The command register is write only while a read from the same address is a read from the status register. Then, if this register shows that the controller is busy, bit 7 set, reading from the status register could and may return undefined results.

A return value of 88d (0x58) is a very common return for the status register. This is shown as: 01011000b

bit 7 = 0 = not busy
bit 6 = 1 = Drive is ready
bit 5 = x = command specific
bit 4 = x = command specific
bit 3 = 1 = Data Request
bit 2 = 0 = obsolete (command specific)
bit 1 = 0 = obsolete (command specific)
bit 0 = 0 = no error

With this in mind, notice that bit 3 is set. This means that the controller/drive is ready for/expecting a data transfer, depending on the command sent.

For example, if you sent the READ command, this bit means that it is ready for you to read from the data register (assuming you are using PIO). If you are reading words (16-bit values), you should read the data register 256 times and this bit will clear.

Note that if you are reading more than one sector at a time, you will receive an interrupt after each sector has been read, no matter how many you are reading, and the DRQ bit (bit 3) will again be set for the next sector.

For writes, the DRQ bit indicates that the drive is ready for a write. I.e.: write a 16-bit word to the DATA register.

32-bit reads and writes are the same, though you only transfer 128 words instead of 256 words.

Also, a read from the status register clears the interrupt status of the command, indicating to the controller that the next command can be started. Sometimes this is not the intent. Therefore, the controller has an ALT STATUS register which returns the exact same result without clearing the interrupt status. You should be reading from it until you are ready to clear the interrupt.