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As far as I can tell, python's mmap and memoryView are both pretty broken in regards to reading and writing from FPGA registers. Here is what I mean:

with open("/dev/mem","r+b") as f:
    mem = mmap.mmap(f.fileno(), 0x1000, offset=ADDRESS_TO_READ)
    mem.read(1)
    #reads one byte
    mem.read(4)
    #reads one 32-bit value, then about 30 cycles later, reads it again.
    mem.read(8)
    #reads two 32-bit values, then about 30 cycles later, reads both again.
    mem.read(9)
    #bus error.
    mem.read(16)
    #reads four 32-bit values, and does not repeat this action after 30 cycles.

Does anyone know what is going on here, or have a possible solution/workaround to this issue? I have seen this post, and as far as I can tell it does not solve the issue. Trying to read two 32-bit values still results in four reads.

Does anyone have any ideas? Thank you.

Conrad
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  • I wrote the original post you mentioned. I spent a lot of time on this issue, and the solution in KT.'s answer really did resolve this for me, reducing both reads and writes to 1 access operation. Nothing else I tried worked though, and I tried a lot of alternatives. I used both a real FPGA and a QEMU image with a custom "device" to debug this. Can you elaborate on why you think it does not solve the issue? How are you counting the read operations? – davidA May 12 '22 at 03:37
  • In one of the deleted answers, someone mentioned an issue with this comment, confirming that KT.'s solution also works for them: https://github.com/vsergeev/python-periphery/issues/50#issuecomment-773659257 – davidA May 12 '22 at 03:42

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