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I want to enable the PA8 pin in a processor (Atmel SAM3X / SAM3A). I have set PIOA_MDERp[7]=0 and PIOA_MDDR[7]=0 and PIO_OER[7]=0 and PIO_ODR[7]=1, so that the tri-state buffer will no longer send data out of the pin, and the pin is enabled to receive data from the environment and to send interrupts if needed. I also want to set my interrupt to rising edge, so I also did PIOA_RHLSR[7]=1 and PIOA_FELLSR[7]=0 and also PIO_ESR[7]=1 and PIOA_LSR[7]=0. My problem now is how to modify NVIC registers so that this interrupt is enabled. I mean, on a rising edge on this pin, the state of this pin is pending, and then the changes I will apply to NVIC causes this pending state to active state. My interrupt group priority and subgroup priority are both 3. I know how to modify Interrupt set-enable register, interrupt clear-enable register, application interrupt and reset control register, and interrupt priority register. Still, my problem is that now I don't have any number for interrupts from this specific pin (PIOA8), so it is different from the time I had my interrupt number (from 1 to 240), and so I could know which register in the NVIC I should modify. Thanks for your help.

m0ss
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  • If you need further information, please don't hesitate to ask! – m0ss May 01 '20 at 16:04
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    A few notes, but Im not sure its exactly your problem. First, `PA8` maps to `PIO_XXX[8]` registers for the PIOA instance, not the `PIO_XXX[7]` registers (the pins are 0 indexed as well as the registers). Second, an interrupt on `PA8` does not map to an IRQ in the NVIC, instead a single interrupt line from PIOA instance goes to the NVIC at IRQ11 (Table 9-11). Whatever code handles IRQ11 will have to read the `PIO_ISR` register to determine which pin in PIOA triggered the interrupt (note that reading `PIO_ISR` also clears the interrupt from the PIOA side). – Unn May 04 '20 at 18:26
  • @Unn Hello. Thanks for your reply. My main concern is your second point, although I should also modify my index number as you mentioned in your first point. Would you explain more how can I change the registers other than those registers I mentioned? I mean, I checked several datasheets but I failed to find a procedure that explains how can I do so. I'd be appreciated If you guide me through the correct datasheet and its specific section, or any other article or video on the internet which explains how can I handed this. I have posted my questions on a couple more forums, with no avail. – m0ss May 05 '20 at 08:22
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    I'd have to dive into it more to make sure I'm not missing any steps if I were to try to lay out all the register interactions needed to setup the interrupt; it'd be easier just to see what you're missing in your code if you could post it (or a shortened version of it) in your question. – Unn May 06 '20 at 06:07
  • This is one question of my assignment. The professor has only taught IRQs, and just explained peripherals to us briefly. Not indicating how to change NVIC in order to enable the pin-driven interrupts. I mean, he even did not specify any specific part of a textbook so that we can find our answer. He only gave us an AT91SAM3 reference manual, a 1500 page pdf without indicating any specific chapter so that we can find the answer. We have not even touched any microprocessor, because before we had a chance, universities were closed due to the outbreak. Nevertheless, I'll state the question below: – m0ss May 06 '20 at 11:44
  • This is the question: "In order to activate the PA8 pin as an input which is sensitive to the rising edge, you should write specific values in certain registers. Group priority for this interrupt is 3 and subgroup priority is 3. Note that In other to active this interrupt, you should also modify the NVIC register, while you also need to apply some changes in the PIO controller. For example, if the pin is programmed to be sensitive to rising edge, when the signal value changes from 0 to 1, the interrupt for the PIO controller unit would have a pending state. Continued in the next comment ->>" – m0ss May 06 '20 at 11:52
  • In order to turn into an active state and have its handler function executed, You need to imply required changes in the NVIC. In order to identify PIOA corresponding registers in the NVIC, you need to find its PID (Peripheral Identification). Also, In Cortex-M3 architecture in AT91SAM microcontrollers, from 8 bits of the interrupt priority, only 4 bits of that are used. For example, the highest possible value for group priority is 0b1111 or 15. You also need to write a C code to assign values to all registers you modify". – m0ss May 06 '20 at 11:57
  • @Unn I don't have any problem writing the C code, given that I know which register I should modify, and it's Address. I think I can find addresses if I have the register names and their specific bits to be written. – m0ss May 06 '20 at 11:58
  • I should also state that I was able to handle the PIOA side. As I stated in my question, I modified PIOA_MDER[7]=0 PIOA_MDDR[7]=0 PIO_OER[7]=0 PIO_ODR[7]=1 and PIOA_RHLSR[7]=1 PIOA_FELLSR[7]=0 PIO_ESR[7]=1 PIOA_LSR[7]=0 So that this pin works as input and reacts to rising edge. All left is the NVIC side. – m0ss May 06 '20 at 13:17

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