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I am working on a project with dspic33E series microcontroller. I am using UART communication to communicate with other devices and store the data that comes from other devices and peripherals. To ensure no data loss in uart communication, I am using FIFO buffer. It is quite useful. After that, I check buffer whenever I need and if there is any data I need to process, then I read it from FIFO buffer and do the necessary process. I am expecting the same performance in DMA when I combine it with UART.

But as far as I know, DMA buffers can only be read half buffer/ full buffer complete interrupt only. I don't know why DMA is architectured like that. If I can access DMA, without waiting for an interrupt to be set to read data from its buffer, I can use it as FIFO also it reduces the burden of the CPU. Is it possible in dspic controllers? How can I approach the DMA to use it as a FIFO buffer without waiting for an interrupt to be set to read its buffers.

I hope that I clearly explain my view over DMA. Give your suggestion regarding this query. Thanks in advance...

CNA
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  • *"How can I approach the DMA to use it as a FIFO buffer"* -- Your wording is awkward. DMA simply is a method to transfer the data. The destination buffer still has to be defined by the driver. DMA is best suited for I/O with a known transfer size, i.e. with fixed block size such as a disk sector. A character device, asynchronous no less, is typically a bad fit for DMA. One workaround for USARTs in Atmel/Microchip MPU SoCs is a receiver time-out feature that is utilized to abort the active DMA transfer when no new input has arrived after N bit-time (indicating possible end of packet). – sawdust May 26 '20 at 20:41
  • Thanks for your comment @sawdust. I will take a look on the method called 'receive time-out'. My doubt is why DMA is designed to be read after generating an interrupt like half/full buffer complete. If it can be bypassed, can we use it as a FIFO circular buffer and read whenever we want? – CNA May 27 '20 at 05:47
  • The receiver time-out I described is implemented in hardware. Your device may not support it. See [this Q&A](https://stackoverflow.com/questions/61295100/how-dma-controller-handles-the-input-devices-like-say-serial-port). The DMA transfers are not synchronized with the CPU and your program; that is the purpose of the DMA completion interrupts. If you *"read whenever we want"*, then you're guessing what is new, valid data. Maybe you can improve the guessing by zeroing/initializing memory as the FIFO is read so new writes are visible 255 out of 256 values. – sawdust May 27 '20 at 07:11
  • This [answer](https://stackoverflow.com/questions/38119491/master-for-interrupt-based-uart-io/38155310#38155310) and the first half of [this answer](https://stackoverflow.com/questions/25318145/dma-vs-interrupt-driven-i-o/38165400#38165400) may help. – sawdust May 27 '20 at 07:40

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