I am studying glibc (The version is 2.32). As for memory barrier, read, write and full barrier for x86 are as follows:
#define atomic_full_barrier() \
__asm __volatile (LOCK_PREFIX "orl $0, (%%" SP_REG ")" ::: "memory")
#define atomic_read_barrier() __asm ("" ::: "memory")
#define atomic_write_barrier() __asm ("" ::: "memory")
As cppreference and this answer say, volatile
tells the compiler don't optimize and reorder this instruction.
Why do write and read barrier not use __asm __volatile
, while full barrier uses it?