Burst Mode Definition

Question

I was reading up on computer organization and in the Memory chapter it mentions that "SDRAMS have several modes of operation, for example burst modes of different lengths can be specified." Can someone elaborate on what a burst mode is?

The main reason why I am confused about this is because in the I/O chapter burst mode was defined as the mode where DMA has direct access to the main memory to transfer blocks of data but this definition doesn't really make sense for the aforementioned in the Memory chapter... also Google gives a slightly different definition =S

score 8 · Accepted Answer · answered Jun 26 '11 at 19:23

8

Burst mode is when you send one address to the memory, but rather than reading/write the data only for the specified address, you also read/write some number of consecutive locations(typically 4 or 8).

Most current processors (and even many that are quite a bit older) have some sort of on-board cache, so a typical read or write will be for all the data in a given cache line. Using a burst read/write allows you to read/write the whole cache line after specifying only its start address, rather than reading one word, then sending the next address to read the next word, and so only for all the data in the cache line.

answered Jun 26 '11 at 19:23

Jerry Coffin

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Thanks, so it does not have anything to do with the DMA having direct access to main memory? Ie. the Processor can be the one reading/writing data? – rrazd Jun 26 '11 at 20:24
@rrazd: yes. In fact, *all* access to modern memory (DDR2, DDR3, etc.) is in burst mode -- they don't support any non-burst mode. If you need only part of a burst, it *is* possible to initiate a burst mode operation, and then abort it when you've done what you needed to. That's fairly unusual though. – Jerry Coffin Jun 26 '11 at 20:27
DMA (burst mode or otherwise) is pretty much obsolete. Before PCI, the PC/AT bus (among others) had separate lines to signal memory transaction and I/O transaction, and read/write. DMA worked by asserting two of these at the same time to read from memory and write to I/O (or vice versa) in one clock. PCI encodes those instead of using separate lines, so it can't do DMA. On PCI, you typically see bus-mastering instead. I don't know of any bus in (even reasonably) current use that could support DMA (though I haven't memorized all the details of every bus in existence either...) – Jerry Coffin Jun 27 '11 at 15:50

score 2 · Answer 2 · answered Jun 26 '11 at 19:27

SDRAM chips are not organized linearly, but rather as "rows" and "columns". A row value is entered into the chip followed by a column value, and then the actual data is read from or written to the chip. This allows fewer pins to be used to access each word while still allowing the chip to hold many millions of words.

"Burst mode" refers to setting a row and column and then using a separate signal to advance the column, allowing access to each word in turn without having to set the row and column each time.

Burst Mode Definition

2 Answers2