I want to learn more about the cache replacement algorithm. For example, I want to know when the cache is replaced, what data is replaced, and what data is brought to the cache. It is a good choice to output this information using the debug flag in gem5. I use classic cache. I created a debug flag to output this information. But I found that when performing the replacement algorithm, it is easy to output the data in which set and way, but it is difficult to output the data in the cacheline. Because I found that only valid, invalid, set, way information is recorded in the replacement algorithm.
- I later found
uint8_t *data
ingem5/src/mem/cache/cache_blk.hh
. This should be cache block data, but why is there only one byte, isn't a cachline 64 bytes? - What I don't understand is that when replacing, it will first find the set where the data is located according to the address. Then look for a cacheline based on the replacement algorithm. But I found that the getPossibleEntries function of the
gem5/src/mem/cache/tags/indexing_policies/set_associative.cc
file, returnsets[extractSet(addr)]
; sometimes returns four addresses, sometimes 8 are returned. Shouldn't it always return every cacheline of the cache set where the address is located? That is 8 addresses?
By the way, I use the DerivO3CPU Thanks for all related answers.