I'm learning thread and locks, which might use atomic operation at the CPU level. I wonder what sample commands are atomic inside an Intel CPU? From a hardware perspective?
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pure loads and pure stores, given some alignment constraints, are truly atomic by operating on all bits in parallel truly simultaneously, not "faking" it for external observers. And anything with a `lock` prefix is atomic from the PoV of external observers, but of course the CPU core *internally* will take multiple steps for any atomic RMW operation. My answers on some of the linked duplicates explain how some of those internals work. – Peter Cordes Dec 30 '20 at 03:31
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"atomic" doesn't have as clear a meaning if we're talking about non-externally-visible things, unless you mean stuff like issue/rename stage updating the RAT (register allocation table) that clock cycle, in a way that can be snapshotted and rolled by by fast branch recovery? If that's the kind of answer you were looking for, please clarify in the question for this to be answerable. (Or I could reopen and post basically my first comment as an answer, along with the duplicate links, if that's what you meant.) – Peter Cordes Dec 30 '20 at 03:33