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I would like to create an array of sc_out and sc_in in sc_module. I looked at the documentation of sc_vector, but I couldn't get it to work. I like to be able to read and write individual sc_out port.

https://eda-playground.readthedocs.io/en/latest/_static/systemc-2.3.1/sysc/a00227.html#ae389bb4e3709ee6385b80cb87ffb64f8

I looked at the source code of System C, it seems to use std::vector. So I think there should be an easy way(may be one line of code) to create this vector of sc_out and use it.

https://forums.accellera.org/topic/1849-array-of-sc_vector-binding-and-assembling-help/

There are also people using sc_assemble_vector, is there any documented examples?

Thanks in advance.

I created the below sample code to show what I'm trying to do. I'm trying to create a size four vector there. sc_vector is a c++ class, so I constructed it in your_module constructor and saved its pointer in array_of_outputs.

#include <systemc.h>

class your_module : sc_module 
{
private:

public:
    sc_in_clk           clk;
    sc_vector < sc_out< unsigned > >* array_of_outputs; // <-------------------here is declaration
    //Constructor
    SC_CTOR(your_module) {
        SC_CTHREAD(entry, clk.pos());
        sc_vector<sc_out< unsigned >> array_outputs("vector_name", 4); // <-- size 4 array
        array_of_outputs= &array_outputs; // <---------------------------save pointer
    }

    // Process functionality in member function below
    void entry() {
        while(true){
            wait();
            (*array_of_outputs)[0].write(2);
            (*array_of_outputs)[1].write(4);
            (*array_of_outputs)[2].write(8);
            (*array_of_outputs)[3].write(10);
        }
    
    }
};

int sc_main(int, char* []) {
    sc_clock clk("Clock", 1, SC_NS, 0.5, 0.0, SC_NS); // 1ns period, 0.5 duty cycle, start at 0ns

    sc_vector<sc_signal<unsigned>> new_vector_wire("the_vector");
    your_module YM("your_module");
    (*YM.array_of_outputs)(new_vector_wire);
    NCTRL.clk(clk);

    sc_start(10000);  // run forever

    return 0;
}
ThisisDisplayName
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  • [This answer](https://stackoverflow.com/questions/35425052/how-to-initialize-a-systemc-port-name-which-is-an-array/35535730#35535730) has some examples of port vectors – systemcpro Jan 11 '21 at 18:34
  • That seems to work. – ThisisDisplayName Jan 11 '21 at 19:29
  • Is this ----> SC_CTOR(M) : port_vec("my_port", SIZE) <---- c++ class syntax, or is it something special to system c? I'm talking about the colon. Also, thanks for the help, that code snippet works pretty well. – ThisisDisplayName Jan 11 '21 at 19:37

0 Answers0