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Searching the Intel Volume 2A docs only reveals 4 uses of [--][--], and only says one short sentence of its meaning:

The [--][--] nomenclature means a SIB follows the ModR/M byte.

Referring to this for the SIB byte:

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So, what does this mean? How do you use it, in the table in which it appears:

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I am starting to get a sense of how to use this table to understand the bottom left corner box of this table, and it's relation to the top column headers, but have yet to understand the rest of this table. I think I can figure out how this computed address stuff works, but what does the [--][--] mean? Do you fill in the -- with registers, so it would be like [eax][eax]? Or, I don't have any idea. Please help.

What are some examples of instruction calls that demonstrate its usage?

Lance
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1 Answers1

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-- is a placeholder / wild-card. That table entry tells you to use that r/m encoding to signal a SIB for any indexed addressing mode.

They seem to be using a weird asm-level syntax where a 2-register addressing mode would look like [edi][eax] or whatever, instead of the more modern-standard [edi+eax]. Although I think MASM does allow [edi][eax].

If your addressing mode matches that [*][*] pattern (i.e. has 2 registers), then you use that entry (and thus signal the presence of a SIB byte).

Peter Cordes
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  • Wait they have examples of `[x+y]` in there too, is it different? So you're saying `[edi][eax]` is the same as `[edi+eax]`, but they have `[BX+SI]` for example, so why didn't they just write `[*+*]` or something like that, or `[--+--]`? I guess this is for 32-bit, whereas `[BX+SI]` is for 16-bit, but still. I guess if you're saying it's a weirdd asm syntax, that is the answer. But why the two forms, I dunno. – Lance Jan 29 '21 at 06:22
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    @LancePollard: 16-bit addressing modes are different: never a SIB byte, so all the possible encodings have to be packed into patterns in the R/M field. [Why don't x86 16-bit addressing modes have a scale factor, while the 32-bit version has it?](https://stackoverflow.com/q/55657904). But yeah in terms of formatting, `[*+*]` could make sense. Probably not what I would have come up with if I was a technical writer and tasked with creating this documentation for Intel, but it does work. – Peter Cordes Jan 29 '21 at 06:48
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    The way they're using it, the meaning is crystal clear: SIB is needed. Even though that includes things like `[eax*4]` - your only option for encoding a scaled register is to make it an index (and to use a disp32 if there's no base), and that means a SIB byte. – Peter Cordes Jan 29 '21 at 06:53