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Intel hardware Prefetcher Intel website shows that there are four kinds of hardware prefechers. The prefetcher controlled by bit 3 is the L1 stride prefetcher. I am running a test code to test what's the trigger condition of the stride prefetcher. I run the code with following steps(set MSR0x1a4 to be 0x7, which means only enable the L1 IP-based strider prefetcher):

repeat following for 10000 times:
    flush
    training phase: access line 0 3 6 9 
    sleep for near 1000 cycles
    measure phase: measure line 12

I expect to see line 12 to be prefetched into the cache. However I can see only the line 0 3 6 9 is hit in the cache. No stride prefetching activities can be observed even after I change the stride or the length of access pattern. So I wonder if anyone has seen prefetching activities in the Intel processor or there is some special trigger conditions that I don't notice?

Anyone who is interested in this case can have a try on test code.Just run sudo ./run.sh is ok. The result on my machine show that access time for line 12 is bigger than 180 cycles mostly. I think there is no problem with time measurement code because if I change the measured line from cache line 12 to cache line 6(just change it at test.c, line 103), then the access time is mostly 25 cycles.

JasperMa
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    Not sure why this was closed, it seems perfectly focused to me. It would help to see actual example code, though, and the tags don't seem to be right; I'll edit them. – Nate Eldredge Feb 24 '21 at 04:54
  • Thanks for your correct. I just update the post to organise the code into a public github repo. You can clone and have a try. I'm confused why the system mark this post as not focused.....I have change something to make it seems focused, but it still fails.... – JasperMa Feb 24 '21 at 07:13
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    See if Hadi's answer on [this question](https://stackoverflow.com/q/53517653/149138) answers your query. – BeeOnRope Feb 24 '21 at 07:44
  • I have seen this post before, but the post didn't share their code. So I'm not sure how Hadi can see a stride prefetching activity. He just says "L1 IP prefetchers starts prefetching after 3 cache misses. It only prefetch on cache hit." And also I can't contact with him for the test code he used. – JasperMa Feb 24 '21 at 07:53
  • @JasperMa: You should have enough rep now to comment on his post and link this question. Hadi's still active on SO so he should see your comment. – Peter Cordes Feb 24 '21 at 08:53
  • Hi, PeterCordes. Thanks for your suggestions. Yes I'm trying to earning reputation now. It seem @BeeOnRope has asked them about the test code under that post, but didn't receive a reply for two years. I also write an email to Hadi several days ago, but didn't receive the reply now. So I just made this post to see whether others know something about this. – JasperMa Feb 24 '21 at 09:00

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