As @alex01011 correctly stated, what you need is a Makefile
, and his solution should work. What I want to suggest here is a better Makefile
.
First make
already know how to use build test
from test.c
in the simple case. It will add parameters to the preprocessor, compilation and linker steps from Makefile
variables, so it is better to use the built-in command for better fleksibility.
# Tell make that `all` and `run` is technically not files that will be built
.PHONY : all run
# These flags are passed to the compiler, we always want to compile with
# warnings when developing
CFLAGS= -Wall
# `all` is the first rule, so that is the one that will be build not
# specifying anything on the command line
# `all` also depends on `test` so that will be built from `test.c` calling
# `make` or `make all`
all: test
# `make run` will run your command. `run` depends on `all` to make sure the
# program exist before calling `./test`
# Note the the indent must be made with a tab and not spaces
run: all
./test
If your program is composed of more files, things get a lit more complicated, but still easily manageable:
# Example of a Makefile for a project that is composed of the files
# test.c foo.c, bar.c, foo.h and bar.h
# The main-function is in test.c, and the generated program will be
# called `test`
#
.PHONY: all run
CFLAGS= -Wall
all: test
# foo.c includes foo.h therefore foo.o depends on foo.h in addition to foo.c
foo.o: foo.h
# bar.c includes bar.h therefore foo.o depends on bar.h in addition to bar.c
bar.o: bar.h
# test.c includes both foo.h and bar.h
test.o: foo.h bar.h
# test should be linked with foo.o and bar.o in addition to test.o
test: foo.o bar.o
run: all
./test
Now typing make run
will automatically build and link test
, if needed, and the run ./test
if there was no errors.
Other variables you may set in addition to CFLAGS
are CC
, CPPFLAGS
, LDFLAGS
, LOADLIBES
and LDLIBS
.
Often you also want to have a clean
targets in your Makefile
for typing make clean
to remove generated files. See info make
for more details.