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If the process contains only 1 thread. And in the code we define a variable int x = 10, it's not qualified by volatile.

  • first, thread runs on cpu core1, it read x and change it to 5;
  • then, thread sleep and re-scheduled onto another cpu core2;
  • then, thread try to read x from memory;

I have several questions:

  • Q1: cpu contains store buffer, and thread task_struct contains register values, so even though the store buffer not flushed to cache, the thread still will read the latest value by restoring the task context?

  • Q2: If the cpu register is reused by other instructions following changing x to 5, latest value 5 isn't stored in register now. Now switching happens, thread runs on another core2 now, will the thread read the latest value? Because the store buffer isn't flushed, cpu core2 won't see the cacheline invalidated, I think the thread will read from memory, so read value is 10? Or the OS apply some barriers for flushing out the entire store buffer before context switching and invalidating the invalidate queue before reading?

zhangjie
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    Yes, not breaking single-threaded code is a requirement for a safe / correct context-switch. This generally happens pretty easily, as a release-store (e.g. in the context saving code that runs on the original core) will make sure all earlier stores are visible to a core that loads the new state (with an acquire load). That's necessary for synchronization of the write / read of the register state, and also brings all in-flight user-space stores with it. However, some ISAs like x86 have special weakly-ordered stores, so OSes generally use an extra barrier to make sure. – Peter Cordes May 19 '21 at 01:34
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    Does this answer your question? [What happens to expected memory semantics (such as read after write) when a thread is scheduled on a different CPU core?](https://stackoverflow.com/questions/60081485/what-happens-to-expected-memory-semantics-such-as-read-after-write-when-a-thre) – Peter Cordes May 19 '21 at 01:35
  • Yes, it helps. I also have another question. Let's take x86 as example, we define a variable `volatile int x = 10`, and there're two threads, thread1 update the value to `x = 5`, thread2 read `x` later, then thread2 will read `x = 5`. I hear that x86 is a kind of strong CPU. Here `strong` means it uses MESI protocol? And x86 also contains store buffer, if thread1 update operation `x=5` will be stored in store buffer, too. If we don't apply memory barriers, how could thread2 read the value `x=5`. I'm confused. – zhangjie May 19 '21 at 10:25
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    All CPUs that can run multiple threads of a C or C++ program have coherent caches, not just x86. (e.g. the Linux kernel uses volatile to implement its own atomic operations, instead of using C11 `stdatomic.h`). Anyway, the store buffer always drains itself to memory as fast as it can, barriers just make the current core wait. See [When to use volatile with multi threading?](https://stackoverflow.com/a/58535118) / [If I don't use fences, how long could it take a core to see another core's writes?](https://stackoverflow.com/q/51292687) – Peter Cordes May 19 '21 at 14:36
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    Note that CPU memory models apply to machine code; C stuff like `volatile int` is just a way to force asm load / store to actually happen in the machine code created by a compiler. But `volatile` doesn't give any ordering guarantees wrt. anything else. For your context switch question, it doesn't matter how a store/reload got into your machine code; they're quite common even in optimized builds. – Peter Cordes May 19 '21 at 14:41
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    Re: CPU memory models: https://preshing.com/20120930/weak-vs-strong-memory-models/ explains what those terms mean. It's about memory *ordering*, not coherency. – Peter Cordes May 19 '21 at 14:42
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    Short answer is yes, absolutely. The kernel scheduler will perform all the necessary memory barriers when switching slices. A full answer requires an additional tag to indicate the language and the standard. C++11 and C++98 have strandardised the memory semantics. so I need to know which language standard you are referring to, to provide quotes. Your questions are very nice and show that you put a lot of thought into them and dug deep, but will likely be closed as a duplicate. – kkm inactive - support strike May 20 '21 at 11:10

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