makefile include directory

Question

I'm getting a strange error from my makefile when trying to compile multiple c files with an include directory.. I'm new to make so its kind of confusing for me but my directory structure looks like this

root\
  main.c
  test.c
  makefile
  inc\
    test.h

These are the contents of each file

main.c

#include <test.h>

int main(){
    maketest();
    return 0;
}

test.c

#include <test.h>
void maketest(){
    printf("This is a test");
}

test.h

#include <stdio.h>
void maketest();

and this is my makefile

OBJFILES = test.o main.o
TARGET = main
CXXFLAGS = -I./inc

.PHONY : all
All : $(OBJFILES)
    $(CXX) $(CXXFLAGS) $(OBJFILES) -o $(TARGET)

When I run make I get this error

cc    -c -o test.o test.c
test.c:1:10: fatal error: 'test.h' file not found
#include <test.h>
         ^~~~~~~~
1 error generated.
make: *** [test.o] Error 1

But the strange part is when I replace CXX with CC and CXXFLAGS with CFLAGS then it actually compiles

OBJFILES = test.o main.o
TARGET = main
CFLAGS = -I./inc

.PHONY : all
All : $(OBJFILES)
    $(CC) $(CFLAGS) $(OBJFILES) -o $(TARGET)

This works and I get this output

cc -I./inc   -c -o test.o test.c
cc -I./inc   -c -o main.o main.c
cc -I./inc test.o main.o -o main

So I'm confused.. am I doing something wrong in the makefile? Is CFLAGS better than CXXFLAGS and should I be using CC instead of CXX? How come the include directory is found when I use CC and CFLAGS but not CXX And CXXFLAGS?

Thanks for the help it's greatly appreciated!