I have the following Makefile.
.PHONY: run
run: bin/p1 bin/p2 bin/p3
bin/p1
bin/p2
bin/p3
bin/%: %.cpp
mkdir -p bin
clang++ -o $@ $<
Is there a way to eliminate the repetition on the run
rule? The prerequisites for run
will continue to grow, so I would like to avoid specifying them twice. I'm trying to get something like this.
.PHONY: run
run: bin/p1 bin/p2 bin/p3
$(foreach p,$^,$(shell $(p)))
However, this doesn't work and I'm actually not sure what this really does...