Could you just sum up these three numbers to get the physical address?
Yeah, that's exactly how it works.
Does anyone know some similar examples, or any formula to calculate the physical location?
In general, as @Peter and @tkausl suggest above, the formula is SEGMENT_BASE + OFFSET. The SEGMENT_BASE is just given by the segment descriptor, while the OFFSET depends on the actual instruction. For MOV instructions (see Referencing the contents of a memory location. (x86 addressing modes)) you can have:
MOV REG, [base_reg + index_reg*scale + displacement]
So the full formula becomes SEGMENT_BASE + base_reg + index_reg*scale + displacement. In your specific case you only have base_reg and displacement.
For reference, from the Intel® 64 and IA-32 Architectures Software Developer's Manuals vol 3A section 3.1 you can read:
Each segment has a segment descriptor, which specifies the size of the segment, the access rights and privilege level for the segment, the segment type, and the location of the first byte of the segment in the linear address space (called the base address of the segment). The offset part of the logical address is added to the base address for the segment to locate a byte within the segment. The base address plus the offset thus forms a linear address in the processor’s linear address space.
If paging is not used, the linear address space of the processor is mapped directly into the physical address space of the processor. The physical address space is defined as the range of addresses that the processor can generate on its address bus.
The following figure should give you an idea of how paging and segmentation can work together:
Now since you don't have paging, if you remove the "Paging" part on the right, all you are left with is the "Segmentation" part, and you are in the following situation (notice the "or Physical Memory" on the right):
Note that the above figure is just indicative, you don't necessarily need to have each segment register point to a different segment descriptor, but you can.
