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Here is my assembly code file.
File name: reveng.s

.global fx
fx:
        push    rbp
        mov     rbp, rsp
        mov     DWORD PTR [rbp-4], edi
        mov     eax, DWORD PTR [rbp-4]
        sal     eax, 3
        cmp     eax, 5744
        sete    sal
        movzx   eax, sal
        pop     rbp
        ret


Terminal Output:

$ gcc -c reveng.s -o reveng.o                                                                               
reveng.s: Assembler messages:
reveng.s:5: Error: too many memory references for `mov'
reveng.s:6: Error: junk `PTR [rbp-4]' after expression
reveng.s:6: Error: too many memory references for `mov'
reveng.s:7: Error: too many memory references for `mov'
reveng.s:8: Error: too many memory references for `sal'
reveng.s:9: Error: too many memory references for `cmp'
reveng.s:11: Error: too many memory references for `movzx'

I am trying to run and compile this Assembly Code using gcc in Kali Linux How can I get gcc to run this?

Peter Cordes
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ChaosWraith
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    Switch your assembler to intel syntax, e.g. `gcc -masm=intel` or stick `.intel_syntax noprefix` at the top of your file. – Jester Feb 07 '22 at 16:21
  • Thanks! That solved all but now i have a new issue: `reveng.s:11: Error: ambiguous operand size for 'movzx'` – ChaosWraith Feb 07 '22 at 16:26
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    @Jester: `gcc -masm=intel -c foo.s` does *not* pass on appropriate options to GAS, it only affects compiling C to asm (using the directive you mentioned). GAS does have command-line options to override syntax, `-msyntax=intel -mnaked-reg` (And maybe also `-mmnemonic=intel`, although modern GAS seems to allow either mnemonic in either syntax mode.) So you could use those with `gcc -Wa,-mnaked-reg` etc. – Peter Cordes Feb 07 '22 at 16:28
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    @HankBoone: `sal` isn't a register name so it's assumed to be a symbol name, and thus a memory operand. So GAS doesn't know whether you want a byte or word source operand; for movz/sx the destination operand-size doesn't imply a source width. Presumably you want `al` here instead of a byte of static storage. (Preferably you'd load and setcc into a different reg than RAX, so [mov-elimination](https://stackoverflow.com/questions/44169342/can-x86s-mov-really-be-free-why-cant-i-reproduce-this-) could work on the movzx, making it zero latency on Intel CPUs from HSW onward, except Ice Lake.) – Peter Cordes Feb 07 '22 at 16:29
  • Thanks guys You all helped answer this for me guys. It now successfully ran. – ChaosWraith Feb 07 '22 at 16:34

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