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I have the following instruction: mov r1, r7 in my assembly code but after looking into disassembly, I've found that actual generated code was adds r1, r7, #0

I checked with ARMv6-M Architecture Reference Manual and I found out that there's MOVS <Rd>,<Rm> instruction (A6.7.40) which is different from ADDS.

While that's not a big issue, I'm still puzzled why assembler replaces code that I wrote by different op-codes. According to the book that I'm reading, all non-jump instructions take 1 cycle (and I'd prefer for assembler to be dumb rather than trying to optimize something for me).

I'm using Raspberry Pi Pico SDK which uses GNU Assembler, AFAIK.

All my code is written in helloworld.S, full source code is:

.thumb_func
.global main

main:
mov r7, #0
bl stdio_init_all
loop:
ldr r0, =helloworld
add r7, #1
mov r1, r7
bl printf
mov r0, #250
bl sleep_ms
b loop
.data
.align 4
helloworld: .asciz "Hello World %d\n"
Peter Cordes
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vbezhenar
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3 Answers3

5

You are writing Thumb mode assembly code and the RPi Pico supports Thumb-2, which means the actual output will be in UAL format.

If you refer to the ARMv6-M reference manual, table D4-1 specifies the conversion of pre-UAL Thumb syntax into UAL syntax, notably:

Pre-UAL Thumb syntax Equivalent UAL Syntax Notes
MOV <Rd>, <Rm> ADDS <Rd>, <Rm>, #0 If <Rd> and <Rm> are both R0-R7.
MOV <Rd>, <Rm> Otherwise.

As is suggested by Tom, you can add .syntax unified if you want to write UAL code (which will then be actually assembled as-is).

Simon Doppler
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    I suspect (but have not verified) that the reason `mov` assembles to `add` in the old syntax is that is that the explicit `mov` was added to the instruction set later and that adding zero used to be the way it was done. – Tom V Mar 06 '22 at 21:49
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Can I suggest that you add:

.syntax unified

at the start of your file? After that you will have to explicitly add suffixes to all your instructions to mark whether they set the flags and whether they are conditional, but you may find it easier to have explicit control of the opcodes used.

Here is your code in the compiler explorer: https://godbolt.org/z/zo8nnc9sh

Tom V
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0

Thumb instructions are 16-bits long which isn't a lot of bits. Since both mov rx, ry and adds rx, ry, #0 do the same thing and adds rx, ry, #0 is more general, only the adds version is supported and mov is converted by the assembler to *adds". So mov essentially becomes a pseudo-instruction.

Other ISAs do similar things. RISC-V doesn't have a mv instruction in the RV32I ISA. It is similarly encoded as addi. The point is to save opcode encoding space, a limited resource.

Olsonist
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  • True `mov` (Thumb1) doesn't set flags; `adds` does. `add`-immediate isn't available until Thumb2. But if you're not using Unified syntax, I'm not sure what the rules are for assemblers mangling your instructions into ones that set flags when you didn't use an S suffix. (RISC-V and MIPS don't have a flags / condition-code register at all, so this is a non-issue. But AArch64 MOV is an alias for [ORR (with register)](https://developer.arm.com/documentation/dui0802/a/A64-General-Instructions/MOV--register-), or ADD-immediate 0 with the stack pointer, without flag-setting.) – Peter Cordes Mar 07 '22 at 00:14
  • @Olsonist I got your point, but actually there's a dedicated `mov` instruction in Cortex-M0 which is used with `.syntax unified` directive. It's not like it's some kind of pseudo-instruction, it's a real instruction that exists and is separate from `add`. – vbezhenar Mar 07 '22 at 20:36
  • @vbezhenar but does mov exist in thumb mode? – Olsonist Mar 08 '22 at 00:01
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    @Olsonist yes, it certainly does exist, I verified it with ARMv6-M Architecture Reference Manual and actual compiled code (which works on Pico which supports only thumb mode). That's why I was surprised to find out this assembler behaviour. – vbezhenar Mar 08 '22 at 21:01