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I am trying to have a Makefile rule that can generate an object file from a source file in a directory that is specified explicitly.

exe: foo.o bar.o

foo.o: path/to/foo.c

%.o: %.c
        echo Making $@ from $<

This example will find it needs to make "exe", then search to make "foo.o". The "foo.o" search will try pattern rules with stem "foo" and fail to use the rule because "foo.c" doesn't exist. I want to find a way to have it see that "foo.o" can be compiled from "path/to/foo.c" using the pattern rule.

In my case it doesn't make sense for me to have the rule be "%.o: path/to/%.c" because the path should be specified for each target that needs the source to be located in another directory.

The pattern rule works for "bar.o" being made from "bar.c" within the same directory and I want to keep that working.

tatsu
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  • Does this answer your question? [How to generate a Makefile with source in sub-directories using just one makefile](https://stackoverflow.com/questions/231229/how-to-generate-a-makefile-with-source-in-sub-directories-using-just-one-makefil) – Renaud Pacalet May 04 '22 at 05:09

1 Answers1

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The solution I am going with for now is:

define c-to-o-command
echo Making $@ from $<
endef

exe: foo.o bar.o

foo.o: path/to/foo.c
    $(c-to-o-command)
%.o: %.c
    $(c-to-o-command)

This has a drawback that the command for the pattern rule is not visible in the Makefile at the same place. It also will need to be expanded for other pattern rules that may need to have this "out of path" dependency.

tatsu
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