Makefile like this:
CFLAGS := $(CFLAGS) -O3
test: main.o
gcc $(CFLAGS) -o $@ $^
clean:
rm test *.o -f
compile 1: command: make
, output: gcc -O3 -o test main.c
compile 2: command: make CFLAGS="-Wall -Werror"
, output: gcc -Wall -Werror -o test main.c
question: why not output: gcc -Wall -Werror -O3 -o test main.c
?