2

What is the action of the "Grpl" instruction in the I386 instruction set? I am learning about computer instruction and doing instruction simulation experiments. During the simulation I encountered such an instruction 83 F8 01.

To find out what to do with this instruction, I consulted Appendix a Opcode Map in the i386 manual. Since the opcode by of the instruction is 83, I found the opcode map entry:
opcode map screenshot

But I don't know what the GRPL means or what the CPU does. I checked the Intel 80386 Instruction Set and couldn't find a description of the Instruction. Instructions that begin with E are followed directly by instructions that begin with H. (enter and hlt)

I also looked up Google and couldn't find a description of the command. Not knowing the actual meaning of this instruction, I had no way to simulate it. How does the CPU implement this? What is the correct query? Do I miss something？

Peter Cordes
  • 328,167
  • 45
  • 605
  • 847
edian
  • 21
  • 1
  • x86 machine code is a byte stream of 8-bit bytes. It's not `83F 801`, it's `83 F8 01`. – Peter Cordes Jul 10 '22 at 18:08
  • 1
    Related: https://stackoverflow.com/questions/67567995/where-do-assembly-instruction-intel-group-categories-originate – ecm Jul 10 '22 at 18:33

2 Answers2

5

What you read as "GRPL" is actually "Grp 1". It is not an instruction that the CPU executes. It's just a means to group related things together.

Looking up the 83h opcode, you see in the table mentioned "Ev, Ib".

The "A.1 Using opcode tables" chapter explains what these character combinations mean.

E --- A ModR/M byte follows the opcode and specifies the operand.
v --- Word or doubleword, depending on operand-size attribute.
, --- Litteraly a separating comma
I --- Immediate data: the operand value is encoded in subsequent bytes of the instruction.
b --- Byte, regardless of operand size attribute.

Your ModR/M byte is F8h or 11'111'000b in binary notation following the grouping 'mod-TTT-r/m'.

Because your instruction 83h belongs to Grp1, it's the bits 5, 4, and 3 of the ModR/M byte (111b) that inform you of the actual instruction. There's yet another table to look up just that, and you'll see that the instruction is cmp.
Because the 2 most significand bits (11b) are set in the ModR/M byte, the 3 least significand bits (000b) refer to a register. Triple zero means the accumulator, but which one AL, AX, or EAX?

For that we have to look at the opcode 83h or 100000'1'1b in binary notation following the grouping 'TTTTTT-s-w'.

Bit 0 (w) tells us this is a word-sized operation. AL is gone, AX or EAX remain.
Bit 1 (s) tells us that the immediate data that follows will be a byte that the CPU will sign-extend before using it in the word-sized operation.

Therefore the 3-byte instruction will be cmp ax, 1 or cmp eax, 1 depending on the mode of operation being real address mode or protected mode. Or vice-versa if the instruction was prefixed with an operand size prefix 66h.

Sep Roland
  • 33,889
  • 7
  • 43
  • 76
  • 1
    It seems like they're reading a bad OCR of the 80386 manual, https://pdos.csail.mit.edu/6.828/2014/readings/i386/appa.htm. Perhaps without the full details on what the table entries mean. Intel's current PDFs have the same table. We already have a couple answers about decoding `xx /y` instructions, like [How to read the Intel Opcode notation](https://stackoverflow.com/a/53976236) and [What does the /4 mean in FF /4?](https://stackoverflow.com/q/24295464), but this one isn't a duplicate because of the "grpL" mixup aspect; they haven't got as far as the specific entry for the encoding. – Peter Cordes Jul 10 '22 at 18:11
  • 4
    @PeterCordes I have the 386 manual (book) right before me and the 4th character in "Grpl" does not ressemble a number at all. It's once that you see that there are "Grp2", "Grp3", ... that you can understand it has got to be "Grp1". – Sep Roland Jul 10 '22 at 18:19
  • Ok, maybe not a "bad" OCR, just an unhelpful one. Intel's current x86 manual ([SDM vol.2](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html#inpage-nav-2), Appending A.3 opcode maps) is much better: `Immediate Grp 1` (plus a superscript, defined in the preceding table as *Bits 5, 4, and 3 of ModR/M byte used as an opcode extension (refer to Section A.4, “Opcode Extensions For One-Byte And Two-byte Opcodes”).*). The font in the current PDF is clearly a `1`, not an `l`. – Peter Cordes Jul 10 '22 at 20:41
  • The downside to the current manuals is that they have to cover 64-bit mode as well, so I can see why someone would be interested in looking at a 386 manual. – Peter Cordes Jul 10 '22 at 20:42
1

0x83 / GRP 1 (one) is the starting byte of a variable length instruction. The next byte 0xf8 would represent the end of the instruction specifying the register with an 8 bit immediate (0x01)

Decoding would then yield a compare of the EAX register against 1.

cmp eax,0x1
Mitch
  • 21,223
  • 6
  • 63
  • 86
  • 1
    x86 machine code in general is variable-length, it's weird to describe a specific instruction as being variable-length. Any that have a ModRM byte have a length that's not uniquely determined by prefixes + opcode byte(s). The `f8` byte isn't the end of the instruction, the `01` is. I think what you're trying to say is that the `83` opcode byte signals that there are more *opcode* bits in the `/r` field. – Peter Cordes Jul 10 '22 at 18:05
  • See [How to read the Intel Opcode notation](https://stackoverflow.com/a/53976236) for details on how the documentation works for instructions like `83 /7 ib cmp r/m32, imm8`. I think Intel's actual tables have a footnote that mention where to look for Group-1 and so on. Decode tables like http://ref.x86asm.net/coder32.html#x83 are useful. – Peter Cordes Jul 10 '22 at 18:06