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I need to find out cache spec of Skylake D-2177 processor spec, specifically the cache spec such as size of L1, L2 and L3 cache. Googling "Skylake D-2177 data sheet" led me to this page, https://ark.intel.com/content/www/us/en/ark/products/136436/intel-xeon-d2177nt-processor-19-25m-cache-1-90-ghz.html, but it only says the cache is 19M.

There are many doc at Intel web site, I am a bit lost navigating the site. Any suggestion how to find the info?

Thanks!

[UPDATE] Thanks @Peter Cordes reference, I see the cache spec at this page, https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(server).

But I still have a general question, how do you find such information from Intel's document? I downloaded Intel's programmer document, https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html, it is a huge doc, still looking, anyway just want to know how you guys look for some detailed CPU info.

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  • It's a Skylake, so the L1d/L1i are both 32KiB per core, private to each core. The L2 is also per-core private, and should be 1MiB per core since it's a server CPU (SKX microarchitecture, with AVX-512), not client (SKL with 256KiB per core). See also [How are cache memories shared in multicore Intel CPUs?](https://stackoverflow.com/q/944966) / [Which cache mapping technique is used in intel core i7 processor?](https://stackoverflow.com/q/49092541) / https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(server) – Peter Cordes Aug 04 '22 at 19:48
  • The SDM doesn't specify details about individual CPUs; it specifies how to write code that will work on any current or future (Intel) x86 CPU. The optimization manual might have some stuff, but being an x86 CPU doesn't imply anything about its cache sizes or associativity. That's why you need specs for individual CPU models separate from the x86 ISA manuals. – Peter Cordes Aug 05 '22 at 00:04

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