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I've recently come across this description of a single processor cache saying that it's

"Word addressed (addresses are left shifted by 2 by adding “00” to end of address inside the processor, this implies that it can address 2^32*4 = 16GBytes of memory"

I understand that word addressing means that each consecutive address holds a word of data versus byte addressing which holds a byte of data at each address. I further understand that left shifting address by 2 means multiplying the address by 4 so we are trying to obtain multiples of 4, but doesn't that imply that each address holds a byte of data thus this is not word addressing but in fact byte addressing and the processor has logic in which we only access a word at a time despite what the memory is like?

So far I am confused on whether word addressed just means we have logic in place to access a word at a time or the actual memory is formatted in a way that each address will hold a whole word and not a byte

johnoldman
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  • I forgot to mention but it's also mentioned that this single processor cache as a 32 bit address space – johnoldman Nov 01 '22 at 04:26
  • Is this a word-addressed cache in a system that uses byte-addressable memory? If the whole system is word-addressable, those 2 low bits of the address don't exist anywhere, and the minimum load/store size is a whole word. – Peter Cordes Nov 01 '22 at 05:32
  • By those 2 low bits of addressing not existing anywhere you mean they're both set to 0s right since we're in a 32 bit address space anyway? – johnoldman Nov 01 '22 at 06:09
  • No, I mean there wouldn't be a place to have zeros. If the whole system (not just some cache) was word-addressable, the system could address 2^32 words, but *not* 2^34 separate bytes. The memory system wouldn't involve bytes at all, only 32-bit chunks of data. If software wanted to use shifts and stuff to pack / unpack octets of bits into words, that's fine but it wouldn't involve memory addresses. (And humans could think about that as accessing "bytes" of a word, but in terms of the memory system there'd be no such thing as a byte, and definitely not with each having its own address) – Peter Cordes Nov 01 '22 at 06:12
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    "word addressing means that each consecutive address holds a word of data versus byte addressing which holds a byte of data at each address" This is correct and standard usage for the terms word addressable vs. byte addressable. See also https://en.wikipedia.org/wiki/Word_addressing, https://en.wikipedia.org/wiki/Byte_addressing – Erik Eidt Nov 01 '22 at 14:54
  • Most all modern computers can access data types in memory that are larger than 1 byte, including words, double words, etc.. These are still byte addressable systems: imho, no one would describe this capability as word addressed. – Erik Eidt Nov 01 '22 at 14:55
  • @ErikEidt: A word-addressable **cache** would be one that requires an RMW of the containing word to handle a byte or halfword store. Like is common in non-x86 CPUs: *[Are there any modern CPUs where a cached byte store is actually slower than a word store?](https://stackoverflow.com/q/54217528)* turns out yes, most non-x86. But you wouldn't build one that handles 32-bit addresses for words in a system that uses 32-bit addresses for bytes, you'd build a word cache using 30-bit addresses, dropping the low 2 bits not shifting. – Peter Cordes Nov 02 '22 at 03:03
  • So this quote is weird, if only the cache is like that, a system like ARM or MIPS still could only address 4GiB not 16 GiB. – Peter Cordes Nov 02 '22 at 03:05
  • @PeterCordes, yes, I was ignoring the cache part of the question and only referring to the basic questions of terminology. – Erik Eidt Nov 02 '22 at 03:58

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