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For some cases my book only includes the machine code and not the assembly code. For data processing we have this: enter image description here

There are some cases i am wondering about:

  1. Add with rd=r3, rn=r2, rot=3, imm8=15,
  2. Add with rd=r3, rn=r2, shamt=5, rm=r8, sh=00(logical shift left)
  3. Add with rd=r3, rn=r2, rs=r5, rm=r8, sh=00(logical shift left)

What is the assembly codes for these cases?

My idea is:

  1. ADD r3,r2,#15,#2
  2. ADD r3, r2, rm,#00, #5
  3. ADD r3,r2, r8, #00, r5

Is this correct?, or what is the correct assembly code?

user394334
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  • For immediates, the rotation is automatically calculated by the assembler so you don't write it separately. Also, the rotate is to the right and is scaled by 2 so `rot=3` means rotate right by 6 bits. Hence the instruction is actually `ADD r3, r2, #0x3c000000`. The other cases should look like `ADD r3, r2, r8, lsl #5` and `ADD r3,r2, r8, lsl r5`. – Jester Nov 14 '22 at 16:30
  • @Jester Thank you very much. But I don't quite get the first example with the immediate. Could you please explain how you got #0x3c000000? – user394334 Nov 14 '22 at 16:43
  • Rotate `0x0000000f` right by 6 bits. Convert to binary if that's easier :) 4 bits of rotation gives you `0xf0000000` and you need 2 more. – Jester Nov 14 '22 at 16:45
  • Related: [mov and mvn](https://stackoverflow.com/questions/27963312/armv5-and-earlier-mov-and-mvn-operands). Also similar are the syntax of 'ldr rX,=0x??????'. The ARM assembler is 'regular width'; a hallmark of risc. Since it is 32bits, and you need space for opcodes, there are tricks like shifting to help create constants that are most likely to be needed efficiently. The assembler just accepts arbitrary constants. However as you have read the datasheet, you now know why some constants may not work. – artless noise Nov 14 '22 at 20:01

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