Can the compiler coalesce atomic stores?

Question

The following code:

#include <atomic>

std::atomic_bool b;

void store2() {
    b.store(true, std::memory_order::relaxed);
    b.store(true, std::memory_order::relaxed);
}

GCC, MSVC, and clang all emit two movs like this:

store2():
  mov     BYTE PTR b[rip], 1
  mov     BYTE PTR b[rip], 1
  ret
b:
  .zero   1

See live demo

Would it be allowed to coalesce these atomic stores into a single mov? I don't believe it would violate the restrictions of std::memory_order::relaxed if other threads observed both atomic stores simultaneously, as if it was just one.

If it is allowed, why don't compilers perform this simple optimization?

It is allowed, but it violates rule of least surprise as well as creates implementation and performance issues. http://wg21.link/n4455 — Swift - Friday Pie, Jun 15 '23 at 15:51

score 3 · Accepted Answer · answered Jun 15 '23 at 16:22

Yes, this would be a valid transformation. Compilers do optimize some atomic operations, but it’s not trivial to modify a compiler to perform such optimizations because the basic strategy for implementing them correctly consists of disabling optimizations that might otherwise apply to them after inlining.

Can the compiler coalesce atomic stores?

1 Answers1