What is the syntax for making an ARM SVC call with arguments from within a C++ class by a member of that class?

Question

I am working on a C++ based RTOS and I need to know the proper syntax for using inline ARM assembly to allow a class member function to generate a SVC instruction with the correct argument setup so as to enter the kernel.

The kernel will extract the SVC instruction 8-bit user-defined code and use it as an index into a table of member function pointers, the idea being that the SVC instruction switches from PSP stack pointer to MSP and executes the member function code in supervisor mode using the MSP stack.

The target is a Cortex-M4 processor and I am working with the community C++17 compiler using -std=c++20 compile option.

For example :

struct Foo
{
  void something (int a , void * b)    // Called by a task
    {
      asm volatile ("svc #00" : : "r" (a) , "r" (b) : "memory") ; // Guessing here...
    }

  void something_svc (int a , void * b)
    {
      ... // Having the 'this' pointer and member function pointer 'something_svc', how to call it from inline ASM?
    }
  } ;

I have tried a large number of various approaches (attribute ((noinline)) , etc) and I am unable to get the correct syntax to make this work correctly.

Sometimes is works fine, then I add a random 'printf' for testing and the compiler rearranges the inline asm code to the point where it is now broken.

I have looked at GCC inline ASM cookbook, the GCC user docs, and numerous online articles but I still can't seem to find the correct method to make this work.

Ideally, the task call would generate mimimal code : Setup r0/r1/r2 for the 'this' pointer and two arguments and then issue the SVC #nn instruction.

The SVC handler would extract the SVC 8-bit 'nn' field, index a table of member function pointers, and call the member function with the 'this' pointer and arguments peeled off the PSP stack.

What is the correct mechanism/syntax to achieve this C++ to ASM to C++ interface?