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I am currently looking through the intel x86 instruction manual (https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html), specifically volume 2, to get an understanding of the features of x86_64 (since I didn't program extensibly in that ISA assembly), and I was confused at the description of ADD and ADC respectively. It states that "15 iw" is "ADC AX, imm16" and "15 id" is "ADC EAX, imm32", and the same thing with "05 iw" and "05 id". My basic question is here: If the CPU encouters the instructions:

15 aa bb 15 cc ...

how does the CPU know you wanted to do "ADC EAX, imm32" with imm32=aabb15cc or "ADC AX, imm16" with imm16 = aabb and then another ADC instruction (with whatever comes after cc)?

I looked at the relevant passages of the manual at the beginning of book 2 and couldn't find it. I was expecting to be explained there and would like to know where I should look instead.

Comparing with How does the CPU distinguish 'CALL rel16' (E8 cw) and 'CALL rel32' (E8 cd)?, I would expect an attribute to be listed, but neither the manual nor https://c9x.me/x86/html/file_module_x86_id_26.html lists this. Is there a reason why it would be explicitly listed for CALL but not for ADC, if it is done that way, and where would the general rule be explained then, or is there a different mechanism (only saw this on the suggestions page before submission, but I don't think it answers the question, it actually makes it more confusing)

With regards, Hypatia of Sva.

Hypatia of Sva
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    It is exactly the same as [How does the CPU distinguish 'CALL rel16' (E8 cw) and 'CALL rel32' (E8 cd)?](https://stackoverflow.com/q/44882315) . The `66` prefix make the operand-size the non-default size for the current mode. `adc eax, imm32` has a `66` prefix in 16-bit mode but not in 32-bit mode. Instead of re-documenting that for every single instruction, Intel documents it in an earlier part of their vol.2 PDF manual, you should read. – Peter Cordes Jul 01 '23 at 01:44
  • It's not explicitly listed in the entry for `call` (https://c9x.me/x86/html/file_module_x86_id_26.html or https://www.felixcloutier.com/x86/call is a newer scrape of a more recent PDF). IDK what you're talking about. The fact that it's *not* part of the documentation for each instruction is why people answer questions but don't point out a specific part of the manual entry. – Peter Cordes Jul 01 '23 at 01:44
  • It states "The operand-size attribute determines the size of the target operand (16 or 32 bits). " for CALL if you search for "attribute". There is no such comment made for ADC. But good to know its the same thing – Hypatia of Sva Jul 01 '23 at 01:48
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    Oh, I see what you mean. The fact that a `rel16` / `rel32` is an "operand" for `call` is non-obvious. It could just as easily have been affected by the "address-size" prefix, `67h`. So it is important to say that `call`'s operand works like an operand, despite not showing a `66` in the encoding (because then they'd need to repeat themselves for 16-bit modes vs. other modes). But for other simple integer instructions it's obvious that the immediate is an operand. And the same distinction applies to encoding `add ax, cx` vs. `add eax, ecx` so it's not just immediates. – Peter Cordes Jul 01 '23 at 01:52
  • Anyway, stuff like https://www.felixcloutier.com/x86/call is just scraped from a PDF, which has introductory chapters before it gets to the entries for each instruction. Better sites like https://www.felixcloutier.com/x86/ actually state this and link to Intel's site for the SDM (manual). AMD has their own manuals, which are sometimes easier to read. – Peter Cordes Jul 01 '23 at 01:54
  • Okay, thanks, then that was a misunderstanding. I will then look under "attributes" for these sort of question not in the Instruction tables, but at the beginning. – Hypatia of Sva Jul 01 '23 at 01:55
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    Note for people searching for it: its described in SDM volume 1 ch. 3.6 (the attribute itself) and volume 2 ch. 2.1.1 Group 3 (the prefix number) – Hypatia of Sva Jul 01 '23 at 02:01
  • Thanks for finding the locations in the official docs. Added that to a footnote on [How to encode an instruction when we just know the hex for opcode](https://stackoverflow.com/q/66904845) to make it a better duplicate for this, and to help people that find that answer directly. – Peter Cordes Jul 01 '23 at 03:43
  • " "ADC EAX, imm32" with imm32=aabb15cc" -- Actually the immediate would be CC15BBAA because amd64 is little-endian. – ecm Jul 01 '23 at 06:21

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