Setting OS variable from rule

Question

I am trying to build a shared library with one set of code, and everything works, except for this issue with my Makefile. Here's my (simplified) Makefile thus far:

OBJS = bar.o

libfoo.so:    OS = LINUX      # These don't seem to happen
libfoo.dll:   OS = WINDOWS

# Linux
ifeq ($(OS), LINUX)
CC = gcc
...

# Windows
else ifeq ($(OS), WINDOWS)
CC = i686-pc-mingw32-gcc
...
endif


all: libfoo.so libfoo.dll

libfoo.so: clean $(OBJS)
    ...

libfoo.dll: clean $(OBJS)
    ...


bar.o: bar_$(OS).c bar.h
    ...

So, when you type make libfoo.so, I expect it to set OS = LINUX first. Then, when it gets to bar.o (it is a dependency of libfoo) it should know which bar_$(OS).c to use. However, I get the error:

make: *** No rule to make target `bar_.c', needed by bar.o. Stop.

Which tells me that when it tries to make bar.o, $(OS) is not set. But shouldn't that be the first thing that happens when I try to make libfoo.so, and that rule is evaluated?

score 2 · Answer 1 · answered Dec 07 '11 at 04:21

2

Target-specific variables are available in the body of the rule, not in its prerequisites. But even if you could get this to work, you'd be asking for trouble: if you build one library and then the other, there's no way for Make to know that the bar.o that was made for the first is wrong for the second and should not be used.

There are several ways to get the effect you want, but none is perfect. I'd suggest using two different object file names, like bar_unix.o and bar_windows.o.

answered Dec 07 '11 at 04:21

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"Target -specific variable " was the phrase I was looking for but didn't know. This makes sense now. Your separately-named o file solution is what I used yo get this working, and I guess I will stick with. Thanks! – Jonathon Reinhart Dec 07 '11 at 13:42
Turns out the way to really do this is with a recursive call to make.(which is more elegant in my situation, as I have a lot of variables to setup for the toolchain). – Jonathon Reinhart Dec 07 '11 at 21:22

score 0 · Accepted Answer · answered Dec 07 '11 at 21:21

If you want to set a target-specific variable, and then have that variable available outside the body of that rule, you can recursively call the Makefile, after exporting the variable:

OBJS ?= foo.o                    # Use ? so it isn't blown away on recursive call

libfoo.so: OS = LINUX
libfoo.so: OBJS += linux_only.o
libfoo.so:
    $(MAKE) -s build_libfoo_linux

build_libfoo_linux: $(OBJS)
    @echo "OS = $(OS)"           # Should print "OS = LINUX"

export OS                        # Can be anywhere

You have to remember to export the variables you want to "persist" after the recursive make call. And also, as shown above, if you append to any variables before the call, you'll want to make their initial assignment with ?= so they aren't set the second time.

score -1 · Answer 3 · edited May 23 '17 at 12:08

-1

You might want to detect the OS using uname and then conditionally compile. This explains

edited May 23 '17 at 12:08

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answered Dec 06 '11 at 23:41

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This doesn't help at all. I'm building the .so and .dll from the same sytem, so what OS my dev box is running is irrelevant. – Jonathon Reinhart Dec 07 '11 at 00:12

Setting OS variable from rule

3 Answers3