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I was wondering if there is a way to store data in the data cache of a processor directly, rather than in main memory. I understand that the way caches work is to store the most frequently used data, however, it would make sense to have an assembly directive to do tell the processor, this is going to be a frequently used data. I am using the IA-32 assembly language.

Thanks!

user1096294
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    In fact, yes this can be done, but it's not something you would want to do. Paper: http://rere.qmqm.pl/~mirq/cache_as_ram_lb_09142006.pdf, Slides: https://www.coreboot.org/images/6/6c/LBCar.pdf. Related question on SO: http://stackoverflow.com/questions/27699197/cache-as-ram-no-fill-mode-executable-code – jmiserez May 20 '16 at 12:31

2 Answers2

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Depending on the architecture, there are prefetching hints to move data directly into the cache. For ia32 this is the prefetch instruction, which may move data to L1, L2.

On the other hand there are instructions which tell the processor to avoid using the cache, like moventdq, which moves data directly from/to memory.

Edit: Additionally there are instructions to setup memory ranges for specific types of caching algorithms, like write back, write through, write combine or uncachable. See http://en.wikipedia.org/wiki/Memory_type_range_register.

Gunther Piez
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  • I'm not sure whether the IA-32 contains SSE. And also as far as i know, it is not guaranteed that after the prefetch instruction the data is stored into the cache. But i could be wrong. – n0p Dec 13 '11 at 23:25
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    SSE was long before x86_64 existed. The Pentium III back in 1999 was the first to contain SSE, to which the `prefetch` instruction belongs, and this was a pure 32 bit processor. Yes, `prefetch` is only a hint, but that's what was asked: "it would make sense to have an assembly directive to do tell the processor, this is going to be a frequently used data." Thats what prefetch is for. – Gunther Piez Dec 13 '11 at 23:36
  • `prefetch` is actually a MMX instruction. So it dates back to 1995. – Gunther Piez Dec 13 '11 at 23:52
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No, you can't access the cache directly in assembly level. Because the cache is "hidden" (L1 and L2) in processor and maybe there's no cache at all.

n0p
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    The cache is (mostly) transparent to the software, so there are no instructions to access the cache separately. Thats because each standard reading or writing instruction does access the cache directly. The other case, accessing the memory directly in circumvention of the cache needs special instructions, but they do exist. – Gunther Piez Dec 13 '11 at 23:45