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I'm unclear on what goes in a makefile, and what goes in a header file.

From what I understand a makefile has the format:

target: dependencies
        instructions

But that didn't work for me. Here's exactly what I did:

library: login.o linked.o cipher.o
    gcc -o library login.o linked.o cipher.o

login.o: login.c linked.h
    gcc -c login.c

linked.o: linked.c cipher.h
    gcc -c linked.c

cipher.o: cipher.c
    gcc -c cipher.c

When I type "make makefile" into the command line the compiler says "make: Nothing to be done for `makefile'". I'm guessing I got the format wrong. Also, what is the library part for? I just copied it from somewhere. Does every makefile have one?

Also, is there an extension for makefiles (makefile.txt, makefile.c)?

And do makefiles have to be named makefile? Could I name it taliasmakefile or makefile69 or lykeim2freespirited4skool or iwanaBahippie?

As for header files I can't find any clear examples of what exactly goes in them. Do you include variables that you want other files to be able to access? Or function prototypes?

I'm really new to C. Could someone explain this to me like I'm 5?

tparf
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    Did you make sure to use tabs to indent the instructions and not spaces? It's critical that you do it with tabs. – Flexo Mar 11 '12 at 23:23
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    Makefiles are completely orthogonal to C. They're just a commonly-used tool for automating the compilation of C source code into an application. If you want to develop an understanding of how header files work, I suggest obtaining [a good book](http://stackoverflow.com/questions/562303/the-definitive-c-book-guide-and-list). – Oliver Charlesworth Mar 12 '12 at 00:02

3 Answers3

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When you run make, it will look for a file called Makefile; you don't have to specify the makefile to use. Without any arguments, make will (usually) build the first target in the file. Makefiles do not need an extension, and can be named other things (but then you have to tell make where to look).

Header files are for function prototypes, types and (global) variables that you need access to from the code you put in .c files (plus some other things like preprocessor #defines that come in handy).

James Aylett
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there's two stages to building C software..... compiling and linking.

compiling turns .C files into object files.

Linking takes all those object files and munges them together into a library or executable.

Header files are used during compilation... it has info about things that you should find at link time. ie.. there should be a function called X, there should be a variable called Y, etc.... or it defines things so they are common across several C files. eg MAX_WIDGETS. ie, it's a way for one .c file to use something that's implemented in another .c file or to define things that are common across .c files.

Makefiles are all about how to take .h .c and run them through compilation and then linking, and any other transformations you want to do to those files.

Keith Nicholas
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Nothing's wrong with the makefile, but there's no target called "makefile". Use the -f option to choose file: make -f makefile. But you don't need it since your file has one of the standard names (Makefile, makefile, ...).

potrzebie
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