Von Neuman Architecture, is this still applicable

Question

Reading the article on Wikipedia on Von Neumann Architecture, it says the following

The meaning of the term has evolved to mean a stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the Von Neumann bottleneck and often limits the performance of the system.

Here it says that the Von Neumann Architecture term has come to refer to the idea that an instruction fetch and data operation cannot occur at the same time due to the fact they need the same bus.

My question is, is this still the case on modern computer systems? Do we still have only one bus to fetch instructions and do data operations with (guessing this is data read/write mainly)?

Answer 1

Almost all modern machines can fetch instructions and data at the same time. They typically have separate instruction and data caches.

However, they nearly always, at some point, place both instructions and data in the same external memory beyond the cache. Typically DRAM.

One might say that modern machines have a Harvard (separate instruction and data, the great rival to Von Neumann) cache architecture, but a Von Neumann (instruction and data in the same memory) memory architecture.

I think the wikipedia article's mention of the shared bus is bogus. In computer architecture / processor design circles, Von Neumann nowadays tends to refer to the idea of a program counter (PC) or, in Intel's parlance, instruction pointer (IP), i.e. a sequencer through a program, where conceptually each of several processors is executing a single instruction at a time. As opposed to, say, something like a dataflow machine, where there is no real notion of a program counter. By the way, modern out-of-order microprocessors such as those I have worked on are internally micro-dataflow machines, but appear to the programmer to be Von Neumann machines with a single program counter.