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I have copied a picture of an assignment I have on MIPS assembly.

I understand (I think) what happens in the code until the line:

beq $11, $0, 3

I understand that the code now makes a PC-RELATIVE branch for the address:

PC+4+3*4

But I don't understand how it comes to happen on this code right here - what is the branch target address? (MARS is simulating a simplified MIPS without branch-delay slots, so that's the next instruction to be executed.)

Row 1: adds 15 to zero, puts it in $a0 register.
Row 2: ANDs $a0 register with 3, puts the result in $a0.
Row 3: ORs $a0 register with 22, puts the result in $a0.
Row 4: shifts $a0 to the left by 5 bits.  Result in $a0.

Row 5: if $a0 equals $a0, go to PC+4+6*24 address. The address is Row 7 which is:

slt $11, $10, $9

Which puts the value 0 in $t3 register, because $10=$9.

Now I get to ROW 8:

beq $11, $0, 3

What does row 8 do?

Direct link to my image - please click if you can't read properly.

enter image description here

Peter Cordes
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Assaf
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  • Since on MIPS every branch has a delay slot after it, the next instruction to be executed after the branch will always be the instruction following the branch. However, I don't think that's the answer you were looking for. I think you need to be more clear about what it is you're trying to understand. – Ross Ridge Aug 08 '14 at 00:22
  • Row 8 is beq, so it is another comparison and potential branch. I think I might be missing the point of your question, though. – Dko Aug 08 '14 at 05:31
  • It's hard to read, but the screen shot appears to have a jump instruction placed in the delay of the branch instruction you call "row 5". This causes undefined behaviour on MIPS. Also, the target of the branch on "row 5" doesn't appear to be "row 7", instead somewhere beyond that. Address `0x0040003C`, I think. – Ross Ridge Aug 08 '14 at 05:49
  • @RossRidge added a link to the image, please see edit, thank you very much. – Assaf Aug 08 '14 at 06:26
  • I recognize the GUI style as the MARS simulator, which by default simulates a MIPS *without* branch-delay slots. So a `j` following a `beq` doesn't cause unpredictable behaviour. – Peter Cordes Apr 14 '22 at 05:54

2 Answers2

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beq $11, $0, 3 means jump to the third instruction ahead from beq if $11 == $0. For instance:

beq $11, $0, 3
instruction 1
instruction 2
instruction 3 < the target

the number 3 will be first sign extended and then added to the program counter $pc as:

$pc = $pc + 3 * 4

or simply:

$pc = $pc + 3 << 2

the 4 is because every MIPS instruction is 4 bytes size.

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    Actually this is incorrect. `beq $rs, $rt, n` skips to the nth instruction AFTER the FOLLOWING instruction. So if `$11` is equal to `$0`, it would branch to instruction 4. – Richard May 03 '17 at 22:42
  • I think Richard is correct. According to the MIPS reference, PC=PC+4+BranchAddr if taken. – fmnijk Feb 07 '20 at 14:05
  • @fmnijk: Yes, since MARS seems to be showing the 16-bit immediate directly, not computing the target address for you or offsetting it at all, it's a displacement in 4-byte words relative to the end of the branch, i.e. relative to the start of the next instruction. [How to Calculate Jump Target Address and Branch Target Address?](https://stackoverflow.com/q/6950230) – Peter Cordes Apr 14 '22 at 06:01
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beq $11, $0, 3

This condition means, firstly check if $11 and $0 are equal or not, if these are equal then control jumps to 3.

Suraj Rao
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Muhammad Zahid
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    Yes, but the question here is "what does `3` mean as a branch target". It seems to be a direct display of the 16-bit immediate from the machine code, so it's a PC-relative displacement. Not absolute address `3`, or absolute anything else, so it's not correct to say you jump "to `3`". – Peter Cordes Apr 14 '22 at 05:57