MIPS JAL Conversion

Question

I'm having difficulty understanding how to translate a JAL (J-Type) instruction in MIPS. Here is the instruction set that I am working on:

0x00400018          add  $a0, $a3, $0 = 00E02020
0x0040001C          jal  L2
0x00400020  L1:     jr   $ra
0x00400024  L2:     sw   $s1, 0($s2)
0x00400028          bne  $a0, $0, ELSE
0x0040002C          j    L1
0x00400030  ELSE:   addi $a0, $a0, A2 
0x00400034          j    L2

The first line did not pose a problem, but for the second line, I am entirely unsure how to translate jal L2. Using the MIPS reference sheet, I see that to get the address, I need to perform R[31]=PC+8;PC=JumpAddr.

J-Type Instructions are opcode/6bit and address 26bit so the first 6bit are 00 0011 but I don't know how I get the remaining 26bit. Any help would be appreciated.

What do you mean by _"get the the remaining 26bit"_? What is this for (i.e. what are you developing)? A disassembler? An emulator? A MIPS core for an FPGA? What are your inputs and outputs? — Michael, Sep 22 '14 at 14:21
This is just for practicing to translate MIPS instructions into Machine Code (first binary then hex). Each MIPS instruction (for example add $a0, $a3, $0) is 32bit and so for line two, since I have the opcode and opcodes are 6bit, I don't know how to get the remaining 26bit (I don't know how to translate jal L2). — Carlo, Sep 22 '14 at 14:34
If you've read the full 32 bit instruction word then all you have to do is mask off the unwanted bits. Something like `lower_26_bits = instruction_word & 0x3FFFFFF;`. — Michael, Sep 22 '14 at 14:44
Please explain this step-by step, in relevance to R[31]=PC+8;PC=JumpAddr. How did you get to 0X3FFFFFF. I guess I don't know what you mean with "mask off the unwanted bits." — Carlo, Sep 22 '14 at 14:52
That was in response to _"I don't know how to get the remaining 26bit"_. To isolate the lowest `N` bits you can do a bitwise AND with `2^N - 1` (where `^` means "power", not "xor"). So your mask would be `2^26 - 1`, which is `0x3FFFFFF`. I suggest that you read up on [bitwise operations](http://en.wikipedia.org/wiki/Bitwise_operation) if you're not familiar with how they work. — Michael, Sep 22 '14 at 15:03
Your example code doesn't do what you apparently think it does. You're invoking undefined behaviour on because you've put jump instructions in branch delay slots. The `jal` instruction will store `0x00400024` in the `$ra` register, the address of the instruction after the `jal` instruction's delay slot. (In other words the address of the second, not the first, instruction after `jal`.) This also trashes the old value in `$ra`, so even with the previous two problems fixed your code will get stuck in an infinite loop. — Ross Ridge, Sep 22 '14 at 17:04
This example code is just for practicing translation into Machine Code, I'm not claiming that it actually works. :) — Carlo, Sep 22 '14 at 17:37
Then you're problably then missing the part of translation where your assembler automatically inserts `NOP` instructions in the branch delay slots. — Ross Ridge, Sep 22 '14 at 18:36
see http://stackoverflow.com/questions/6950230/how-to-calculate-jump-target-address-and-branch-target-address — markgz, Sep 22 '14 at 19:22

score 5 · Accepted Answer · answered Apr 20 '17 at 13:13

5

I know this is completely irrelevant now, but for anyone that stumbles upon this question and needs help:

You would take the address of L2 --> 0x0040 0024 and shave off the first four bits, and last two. This would leave you with:

0000 0100 0000 0000 0000 0010 01 as your remaining 26 bits.

Hope I was able to help someone!

answered Apr 20 '17 at 13:13

Bri

386
4
12

But it is not work if the first four bits of PC is not 0x00. – A'' Aug 04 '19 at 17:31

score 0 · Answer 2 · answered Sep 22 '14 at 18:24

MIPS has a couple of different control-flow instructions:
1. (conditional) branches
2. (unconditional) immediate jumps
3. (unconditional) register jumps

branch b contains a 16 bit signed integer number of instructions, relative to the next instruction, to branch to.

jump j /jump and link jal contains a 26 bit immediate, which is shifted right by two (because all MIPS (32) instructions are 4 bytes long). The upper 4 bits come from the instruction sequentially following the jump.

jump register jr /jump and link register jalr do not contain a branch target. The target is in a register, and as such is already 32 bits long.

MIPS JAL Conversion

2 Answers2