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I need to check for a sequence till end of simulation, after the initial match. 

property check_at_fall;
@(posedge clk) 
    $rose(enable) ##[1:$] $fell(enable) |-> ##[0:2] ch_sel_seq [*1000]   ;
endproperty
assert_TELEMETRY : assert property (check_at_fall)
else `uvm_error("ADC_if",$psprintf("unexpected sequence "))

What I want is something like [*$] instead of [*1000] above. I don't want to give a huge number, I want to run it forever.

AndresM
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Sini
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  • You can try something like `ch_sel_seq[*1:$] ##0 1'b0;` It will tell you when `ch_sel_seq` fails, but the assertion will never be complete. This may be a concern in your coverage collection. – Greg Sep 22 '15 at 18:39

1 Answers1

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From SystemVerilog 1800-2012 page 359:

To specify a finite, but unbounded, number of iterations, the dollar sign ( $ ) is used. For example, the repetition

a ##1 b [*1:$] ##1 c

Moreover, [*] is an equivalent representation of [*0:$] and [+] is an equivalent representation of [*1:$].

Convergent
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