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The concept of binary division in MIPS has been explained in the Pattern's computer organization book. However, when I comes to the improved division algorithm, things are not very clear. Consider the following diagram.

enter image description here

While it is talking about 32-bit integers, I want to know what are the register sizes for 1001010÷1000? Here is my understanding:

Dividend: 1001010 which should be 8-bit 0100,1010

Divisor: 1000 which should be 8-bit 0000,1000

Now what about the registers in the diagram? Divisor 32-bit should be 8-bit and big 64-bit remainder register should be 16-bit. Am I right?

Now the problem is, where to put the divisor's value in the register? Higher left or lower left since we will shift it to right, it should be initialized as 1000,0000.

Also, the big remainder register is shifted left as the caption states but it also has a shift right control input.

Can someone explains this diagram with a working example?

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  • This seems to be a question about hardware, rather than programming, and thus off-topic on Stackoverflow. – njuffa Apr 01 '16 at 10:14
  • If that becomes clear then we are able to program it with MIPS assembly language. So, in my opinion, it not completely off-topic – mahmood Apr 01 '16 at 10:18
  • I would suggest revising the question so it is clearly focused on programming. If the question is mostly about combining the quotient and remainder in a double-width register (typically register *pair* for software), take a look at [this answer](http://stackoverflow.com/a/32443307/780717) – njuffa Apr 01 '16 at 17:40

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