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So I am trying to replicate a basic MIPS processor, and I was wondering how you would implement comparison instructions? It just doesn't seem to fit in with the rest of the design? I have been reading and apparently the set less than operation in the alu can be used as a comparator, but couldn't you just use a bit-sliced comparator in the alu? What is the implementation of a comparison instruction in a MIPS processor? [https://i.stack.imgur.com/QtX6D.png][1]

  • Isn't `SLT` a comparison instruction? – hayesti Mar 24 '17 at 19:23
  • Use a bit-sliced comparator in the ALU for what, to implement SLT? – harold Mar 24 '17 at 23:15
  • It would be to implement greater than, less than, and equal to. So <, >, and = – SiliconeCoder18 Mar 25 '17 at 00:54
  • See also [How to do less than or equal in Assembly Language(MIPS)?](https://stackoverflow.com/q/22736836) re: how to do `x <= y` or `x>y` and similar things in MIPS, with at most 2 instructions to materialize a 0/1 bool in a register, or to branch on it. – Peter Cordes Jun 23 '22 at 23:21

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One possible way is to use subtraction. The result of the subtraction is compared to zero, basically ORing all bits of the result together, and the sign bit is extracted.

If the two values are equal the result would be zero and zero flag is set and if they are unequal the zero flag is unset. If the first value is less than the second value than the result would be negative and if it is greater than the second value than the result would be not zero and not negative.

Also this comparisons can be combined, e.g. less then or equal is simply a negative result or the zero flag is set. With this it should be possible to implement all comparisons that the MIPS ISA supports.

fsasm
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  • You'd need at least a 33-bit result for this to work, subtracting sign-extended inputs. `-128 < 1` is true, but if you 8-bit subtraction you'd get `-128 - 1` = `+127`, signed overflow. That's why x86 signed-compare conditions involve OF and SF. And equivalently why MIPS `slt` can't just subtract and use the sign bit of the result. (MIPS doesn't have a flags register, it has instructions like `slt $v0, $a0, $a1` to do `v0 = (int)(a0 < a1)` producing a 0 or 1 integer result.) See http://teaching.idallen.com/dat2343/10f/notes/040_overflow.txt for 4-bit examples of add overflow. – Peter Cordes Jun 23 '22 at 23:18