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Pls Explain how this code work... 

module top;
    //string mem [5];        
    real mem [5];            
    initial begin
        $sreadmemh(mem,2,3,"A","B");
        $display("mem = %p",mem);
    end 
endmodule
subh
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  • I am no aware of such a function so my guess is that: 1/ It is a typo and should be $readmemh or 2/ It is a function written by a user, a so called PLI function. – Oldfart Aug 06 '18 at 17:21
  • @Oldfart it is discussed under section D.14 LRM 1800-2012, but that is not much clear. Thanks!!! :) – subh Aug 06 '18 at 18:19

1 Answers1

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As you correctly found, $sreadmemh and $sreadmemb are both defined as optional system tasks in the IEEE 1800-2009 (the might be in IEEE 1800-2005, I dont have it to check as readily). They basically serve as additions to the traditional $readmemh and $readmemb, taking in string argument(s) instead of a file name.

From the LRM (D.14):

$sreadmemb ( mem_name , start_address , finish_address , string { , string } ) ; $sreadmemh ( mem_name , start_address , finish_address , string { , string } )

The system tasks $sreadmemb and $sreadmemh load data into memory mem_name from a character string.

The $sreadmemh and $sreadmemb system tasks take memory data values and addresses as string literal arguments. The start and finish addresses indicate the bounds for where the data from strings will be stored in the memory. These strings take the same format as the strings that appear in the input files passed as arguments to $readmemb and $readmemh

Basically, if supported, they can be used like $readmemh or $readmemb where there is no file (thus no filename argument) but instead you can place what would be the contents of the file directly as a string, and use that in the initializing function (kinda like fscanf vs sscanf in C). However, unlike the $readmemh or $readmemb, the starting and ending addresses are not optional and you can put as many string arguments as you like and its as if they are concatenated together. So, these are all the same:

logic [7:0] mem[10];
...
  $sreadmemh(mem, 0, 9, "AB", "BC", "12");
  $sreadmemh(mem, 0, 9, "AB BC 12");
  $sreadmemh(mem, 0, 9, {"AB", " BC", " 12"});

Note that since the input string is handled just as it would be for $readmemh and $readmemb, you can separate the values by any white space, use 'bx and 'bz for four state variables, and use @addr to start loading at specific addresses. More details on this format can be found in IEEE 1800-2012 21.4 or another answer: How to initialize contents of inferred Block RAM (BRAM) in Verilog

Unn
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