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I am using a custom board, having zynq-7000. I am running two application on both cores. I want to put cpu0 in non-secure world and cpu1 in secure world. As Cpu1 is already in secure world, I am trying to make Cpu0 in non-secure world.

I am trying to put cpu0 in normal-world and I add following lines in fsbl.

__asm__ (
    "MRC     p15, 0, r0, c1, c1, 0;"
    "ORR     r0,  r0, #0x1;"
    "MCR     p15, 0, r0, c1, c1, 0;"
);

But unfortunately, my system hangs, and some time gives “DATA_ABORT_HANDLER FSBL Status = 0xA304”. I have added these lines (assembly instruction) in fsbl and tried it as a patch to u-boot(if i boot linux instead of baremetal app).

I have also set bits in TZ registers to be unsecure for testing.

Xil_Out32( TZ_OCM_RAM0, 0xffffffff);
Xil_Out32( TZ_OCM_RAM1, 0xffffffff);
Xil_Out32( TZ_OCM, 0xffffffff);
Xil_Out32( TZ_DDR_RAM, 0x0000ffff);

Can someone tell me where to go from here?

Thanks.

artless noise
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Khurram
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  • This is more involved than you may think. As per [TZ monitor mode and ifsr, etc](https://stackoverflow.com/questions/22080918/trustzone-monitor-mode-and-ifar-ifsr-dfar-dfsr) you can set CP15 register for normal world from monitor mode. Banked CP15 registers have **normal world** values that are garbage **from boot**. You need to init them to default (reboot secure world) values before running code. Also the ARM CPU register should probably be changed before entering the normal world. Also Linux itself needs some support from the secure world and you have to provide via monitor mode `SMC`. – artless noise Sep 20 '19 at 21:15

1 Answers1

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I think you need to modify ARM Trusted Firmware to do that.

user12091136
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