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I'm writing a verilog code for the convolution layer in a CNN, and i'm getting the following errors:

1)ERROR:HDLCompiler:257 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 52: Cannot assign to non-variable max_irow

2)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 52: Procedural assignment to a non-register max_irow is not permitted, left-hand side should be reg/integer/time/genvar

3)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 52: Procedural assignment to a non-register max_irow is not permitted, left-hand side should be reg/integer/time/genvar

4)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 52: Procedural assignment to a non-register max_irow is not permitted, left-hand side should be reg/integer/time/genvar

5)ERROR:HDLCompiler:257 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 54: Cannot assign to non-variable max_icol

6)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 54: Procedural assignment to a non-register max_icol is not permitted, left-hand side should be reg/integer/time/genvar

7)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 54: Procedural assignment to a non-register max_icol is not permitted, left-hand side should be reg/integer/time/genvar

8)ERROR:HDLCompiler:257 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 56: Cannot assign to non-variable max_krow

9)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 56: Procedural assignment to a non-register max_krow is not permitted, left-hand side should be reg/integer/time/genvar

10)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 56: Procedural assignment to a non-register max_krow is not permitted, left-hand side should be reg/integer/time/genvar

11)ERROR:HDLCompiler:257 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 58: Cannot assign to non-variable max_kcol

12)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 58: Procedural assignment to a non-register max_kcol is not permitted, left-hand side should be reg/integer/time/genvar

13)ERROR:HDLCompiler:1660 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 58: Procedural assignment to a non-register max_kcol is not permitted, left-hand side should be reg/integer/time/genvar

14)ERROR:HDLCompiler:255 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 60: Cannot assign to memory sum directly

15)ERROR:HDLCompiler:747 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 60: Range is not allowed in a prefix

16)ERROR:HDLCompiler:698 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 60: Part-select of memory image is not allowed

17)ERROR:HDLCompiler:971 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 60: Illegal operand for operator *

18)ERROR:HDLCompiler:1373 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 60: Unpacked value/target cannot be used in assignment

19)ERROR:HDLCompiler:598 - "D:\DSD_CEP_verilog\convolution_normal.v" Line 21: Module <convolution_normal> ignored due to previous errors.

My verilog code is:

module convolution_normal(sum,clk,image,kernel,bias);
/*suppose we have input image of size 15*16*3, and a kernel of size 3*3*3*/

parameter reg max_irow = 15;  //number of input rows
parameter reg max_icol = 16;  //number of input columns
parameter reg max_idepth = 3; //depth of input
parameter reg max_krow = 3;   //number of kernel rows
parameter reg max_kcol = 3;   //number of kernel columns
parameter reg max_kdepth = 3; //depth of kernel
parameter reg max_orow = 15;  //number of output rows
parameter reg max_ocol = 16;  //number of output columns
parameter reg max_odepth = 3; //depth of output

input clk;
input bias = 0;
input image[max_irow:0][max_icol:0][max_idepth:0];
input kernel[max_krow:0][max_kcol:0][max_kdepth:0];
output reg sum[max_orow:0][max_ocol:0][max_odepth:0];

always@(posedge clk)
begin
//NOTE: ++ does not exist in verilog
 for (max_irow = 0; max_irow <= max_irow; max_irow = max_irow+1)
 begin
  for (max_icol = 0; max_icol <= max_icol; max_icol = max_icol+1)
  begin
   for(max_krow = 0; max_krow <= max_krow; max_krow = max_krow+1)
    begin
     for(max_kcol = 0; max_kcol <= max_kcol; max_kcol = max_kcol+1)
     begin
      sum = image[max_irow:0][max_icol:0][max_idepth:0]*kernel[max_krow:0][max_kcol:0][max_kdepth:0];    
     end
    end
  end
 end
end
endmodule

Can someone please solve this issue?

Matthew Taylor
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    `parameter` is a **constant** in verilog. You cannot modify a constant. Your code is trying to do it in *for* loop counters. – Serge Jan 26 '21 at 21:19
  • Does this answer your question? [Difference between "parameter" and "localparam"](https://stackoverflow.com/questions/30288783/difference-between-parameter-and-localparam) – Qiu Jan 27 '21 at 11:10

1 Answers1

0

Your loops are incorrect : for example :

 for (max_irow = 0; max_irow <= max_irow; max_irow = max_irow+1)

max irow is a parameter not a variable. It cannot be incremented or assigned.

Same problem with all other loops.

You should modify them in this way :

integer iter;
for (iter = 0; iter <= max_irow; iter = iter+1)