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I thought I've understood this but I think I've confused myself.

RISC-V RV32G Encoding

I was under the impression that [11:0] was the order of the immediate bits within the encoding. As an example, addi x1, x2, 12 would have an immediate of 000000001100; the immediate would start at bit 20 within the addi instruction encoding.

I'm confused how this logic applies to the same notation used within the U-type encoding [31:12]. I understand the U-type immediate is 20 bits but I'm now unsure of how to interpret the notation.

Peter Cordes
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  • Okay, this is sinking in more. The greatest decimal value that can be used as an immediate within the `lui` instruction would be (2^31/2)-1 then? – Shawn Armstrong May 02 '21 at 09:09
  • No, `(2^32 - 1) & -4096` = 4294963200 = 0xfffff000. (As an address, the address of the highest 4k page in the low 4GiB of virtual address space.) Any pattern in the high 20, all-zero in the low 12. – Peter Cordes May 02 '21 at 10:01

1 Answers1

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U-type is for lui, where the immediate goes into the high 20 bits of Rd, and the lower 12 bits are cleared. Or for auipc, same decoding; bits [31:12] come from the instruction, the low 12 are implicit 0.

So the bit-numbers are the position within the decoded value, not just within the immediate itself.

The position within the diagram shows you where each value-bit comes from in the machine encoding; the [hi:lo] bit-range numbers show you which value bit (in a full 32 or 64-bit integer) this field maps to.

For more general stuff about the rest of RISC-V immediates, see the design comments in the ISA docs, quoted and expanded upon in a couple SO Q&As:

Peter Cordes
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