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I am trying to understand the STM32H7 MPU example, In this example, only one region has been created for all the memory address space 4GB.
The subregion option is activated which means, it will be divided into 8 subregions starting from 0x0.
And SRD is set to 0x87 which means the MPU will be enabled only on: On-chip peripheral address space, external RAM, Shared device space.
This seems strange to me because we kept the most important address space unprotected for Flash, SRAM, System, and Non-shareable devices.
Any explanation of the reason the subregions were configured that way?

artless noise
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Hamdim
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2 Answers2

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When a ThreadX Module thread is scheduled, the MPU is reconfigured such that the module can only access its code and data memory.

ScottAzureRTOS
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  • Thank u for the clarification, does this mean that the initial configuration of MPU is useless? and can you point out in which file the reconfiguration is happening(I checked the example project, TX, and module APIs but I did not find any reconfiguration of the MPU neither by HAL or bare-coded). I would like to know how the MPU is configuring the modules regions and change it – Hamdim Aug 18 '22 at 20:54
  • I have tried to debug it after loading and starting the module, the SRD becomes 0 then the MPU_CRL ENABLE bit is 0, and it did not change even after stopping and unloading the module, doesn't this means the mpu is totally disabled? – Hamdim Aug 19 '22 at 09:33
  • The MPU is reconfigured in the scheduler. See my other comment with a link to the GNU M7 port. – ScottAzureRTOS Aug 19 '22 at 15:46
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One background region is created during initialization. This region is the only active one for privileged code. Module specific regions are configured every time there is a task switch into user code. More information here: https://developer.arm.com/documentation/dui0646/c/Cortex-M7-Peripherals/Optional-Memory-Protection-Unit?lang=en

Andrés
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  • can you point out the file where the reconfiguration is happening? I checked the documentation, the background region is optional, does this means it is enabled by default, and the subregions in the example that are configured without MPU protection(On-chip peripheral address space, external RAM, Shared device space) are considered privileged and thereby protected from other regions as they are part of the background region? what defines the background region(address space, attributes..), is it configurable(can you please point out the code) or it is forced by the MPU(based on what?) – Hamdim Aug 18 '22 at 21:03
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    Every module has its own MPU configuration. The MPU is reconfigured in the scheduler, https://github.com/azure-rtos/threadx/blob/master/ports_module/cortex_m7/gnu/module_manager/src/tx_thread_schedule.S#L431-L442 For Cortex-M MPUs with 16 regions, the user can define the last 4 regions however they wish. For more information about background regions, see the Armv7-M Architecture Reference Manual. – ScottAzureRTOS Aug 19 '22 at 15:42
  • Does this means the MPU initialization in [main.c](https://github.com/STMicroelectronics/x-cube-azrtos-h7/blob/main/Projects/STM32H747I-DISCO/Applications/ThreadX/Tx_MPU/Core/Src/main.c#L221-L246) is totally useless or it has a role before the modules loading? – Hamdim Aug 22 '22 at 11:40
  • If you configure the MPU by yourself in main.c, these changes are going to be lost once the scheduler start, as the MPU configuration is constantly changed. – Andrés Sep 18 '22 at 09:40