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I am stuck with a problem for which I searched on various threads unsuccessfully.

I have a project built with autotools utilities. This project relies on preprocessor directives which activate blocks of code depending on the presence of libraries or other stuff.

The problem I am facing is that once the project is built, for example like: ./configure --enable-mpi=yes && make

(Note that --enable-mpi=yes is set to add -DMPI_LIB=1 to the list of compiler flags.)

If I rebuild the project like ./configure --enable-mpi=no && make

Nothing is done for make. I think it is normal behaviour as no files changed except compilation flags (-DMPI_LIB=0 in that case).

How then can I add a dependence on flag changes in Makefile.am ?

I came across this thread: Makefile trigger rebuild for C/C++ preprocessor directives. Unfortunately I do not know how to adapt this to Makefile.am as there seem to be pretty high limitations in conditionals handling in Makefile.am.

Thank you for any advice !

EDIT I may have found a workaround, or maybe the right way of doing it in another thread how to force recompile when changing Makefile flags? (I am not much experienced with make). If I add Makefile as a dependency to my object files it does the job, e.g. recompiles whenever a compilation flag changed.

naffrancois
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    The easiest thing to do is simply to `make clean` whenever you reconfigure in a way that you expect may invalidate existing built objects. Another alternative is to maintain [a separate build tree](https://www.gnu.org/software/automake/manual/html_node/VPATH-Builds.html) for each distinct configuration, which prevents the problem from arising in the first place. – John Bollinger Dec 22 '22 at 20:19
  • Thank you for the advice, I like the idea of parallel trees although if I understand it correctly this would require maintaining a number of build directories equal to the number of flags combinations. I have also a build chain based on scons and it handles it automatically. I thought it could be done easily with configure and make. Although I agree invoking extra make clean is not such a big deal, it is in my opinion error prone, you forget to do it once and end up with a false build. Anyway, adding Makefile as a dependency to my objects does the trick, is there any downside to it? – naffrancois Dec 23 '22 at 22:21
  • Adding the makefile(s) as prerequisites for your objects is fine in principle. Such are true dependencies. But this requires you to *identify* (all) the objects, and maintain one or more custom `make` rules expressing the dependency. Automake can support that, but it suddenly becomes rather less "auto". – John Bollinger Dec 24 '22 at 14:18
  • Yes I see what you mean. I had to add quite a lot of manual commands into makefile.am which is quite against the philosophy of automake. In the end I am not that far from writting a proper makefile, given that apart from this flag dependency thing I was not able to find out a way to build an automatic dependency search with this fortran project. So I had to write down explicitly all objects dependencies, so indeed my automake has lost some interest... – naffrancois Dec 26 '22 at 23:02

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