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Consider the j(jump) instruction in MIPS. How far can it jump in memory? Would it be 32bits? Can i please have an explanation.

user977154
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1 Answers1

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From this page, you'll see that the jump instruction has the following effects:

PC = nPC; nPC = (PC & 0xf0000000) | (target << 2);

target is a 26 bit number. That means the j instruction can jump to any absolute address that can be created from the operation above. The largest value for target, therefore, is 226-1 (0x03FFFFFF), and the highest reachable address is (PC & 0xF0000000) | 0x0FFFFFFC.

A P
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Carl Norum
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  • similar discussion [Range of MIPS j instruction](http://electronics.stackexchange.com/questions/162976/range-of-mips-j-instruction) – WY Hsu Apr 12 '17 at 07:12
  • link is dead, try the archived version - https://web.archive.org/web/20120107030450/http://www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSir.html – A P Jul 02 '22 at 18:15
  • Another way to say this is that `j` is region-absolute, in the region containing the instruction *after* the `j` itself (the branch-delay slot). Notice the `PC = nPC` statement before keeping the high 4 bits of PC; you omitted that from later discussion but still used PC instead of next_PC. That PC+=4 can propagate carry into the high 4 bits at the end of a 256MB region. – Peter Cordes Jul 02 '22 at 21:48
  • I always find it unclear to just write "PC" for a single instruction, whether that's the instruction address, or already incremented before decode. I'd have written `((J_addr+4) & 0xf0000000) | target << 2`. e.g. in [How to Calculate Jump Target Address and Branch Target Address?](https://stackoverflow.com/q/6950230) it requires multiple paragraphs of text to clarify those diagrams that use `PC`. (Especially because the diagrams are sloppy re: the corner case where the delay slot is in a different region than the `j`.) – Peter Cordes Jul 02 '22 at 21:50